Fix deprecations in tests

13 files changed, 26 insertions, 26 deletions

diff --git a/src/test/scala/chiselTests/ComplexAssign.scala b/src/test/scala/chiselTests/ComplexAssign.scala
index e101e7c0..56a7aa3d 100644
--- a/src/test/scala/chiselTests/ComplexAssign.scala
+++ b/src/test/scala/chiselTests/ComplexAssign.scala
@@ -37,7 +37,7 @@ class ComplexAssignTester(enList: List[Boolean], re: Int, im: Int) extends Basic
   val dut = Module(new ComplexAssign(32))
   dut.io.in.re := re.asUInt
   dut.io.in.im := im.asUInt
-  dut.io.e := Vec(enList.map(_.asBool))(cnt)
+  dut.io.e := VecInit(enList.map(_.asBool))(cnt)
   val re_correct = dut.io.out.re === Mux(dut.io.e, dut.io.in.re, 0.U)
   val im_correct = dut.io.out.im === Mux(dut.io.e, dut.io.in.im, 0.U)
   assert(re_correct && im_correct)
diff --git a/src/test/scala/chiselTests/Decoder.scala b/src/test/scala/chiselTests/Decoder.scala
index ff73a676..ff6c83b9 100644
--- a/src/test/scala/chiselTests/Decoder.scala
+++ b/src/test/scala/chiselTests/Decoder.scala
@@ -15,14 +15,14 @@ class Decoder(bitpats: List[String]) extends Module {
     val inst  = Input(UInt(32.W))
     val matched = Output(Bool())
   })
-  io.matched := Vec(bitpats.map(BitPat(_) === io.inst)).reduce(_||_)
+  io.matched := VecInit(bitpats.map(BitPat(_) === io.inst)).reduce(_||_)
 }
 
 class DecoderTester(pairs: List[(String, String)]) extends BasicTester {
   val (insts, bitpats) = pairs.unzip
   val (cnt, wrap) = Counter(true.B, pairs.size)
   val dut = Module(new Decoder(bitpats))
-  dut.io.inst := Vec(insts.map(_.asUInt))(cnt)
+  dut.io.inst := VecInit(insts.map(_.asUInt))(cnt)
   when(!dut.io.matched) {
     assert(cnt === 0.U)
     stop()
diff --git a/src/test/scala/chiselTests/MemorySearch.scala b/src/test/scala/chiselTests/MemorySearch.scala
index d36167a4..93902d22 100644
--- a/src/test/scala/chiselTests/MemorySearch.scala
+++ b/src/test/scala/chiselTests/MemorySearch.scala
@@ -14,7 +14,7 @@ class MemorySearch extends Module {
   })
   val vals  = Array(0, 4, 15, 14, 2, 5, 13)
   val index = RegInit(0.U(3.W))
-  val elts  = Vec(vals.map(_.asUInt(4.W)))
+  val elts  = VecInit(vals.map(_.asUInt(4.W)))
   // val elts  = Mem(UInt(32.W), 8) TODO ????
   val elt  = elts(index)
   val end  = !io.en && ((elt === io.target) || (index === 7.U))
diff --git a/src/test/scala/chiselTests/MulLookup.scala b/src/test/scala/chiselTests/MulLookup.scala
index 936f3a45..38d010ee 100644
--- a/src/test/scala/chiselTests/MulLookup.scala
+++ b/src/test/scala/chiselTests/MulLookup.scala
@@ -13,7 +13,7 @@ class MulLookup(val w: Int) extends Module {
     val y   = Input(UInt(w.W))
     val z   = Output(UInt((2 * w).W))
   })
-  val tbl = Vec(
+  val tbl = VecInit(
     for {
       i <- 0 until 1 << w
       j <- 0 until 1 << w
diff --git a/src/test/scala/chiselTests/SIntOps.scala b/src/test/scala/chiselTests/SIntOps.scala
index a9b75446..2c8267af 100644
--- a/src/test/scala/chiselTests/SIntOps.scala
+++ b/src/test/scala/chiselTests/SIntOps.scala
@@ -40,7 +40,7 @@ class SIntOps extends Module {
   io.lessout := a < b
   io.greatout := a > b
   io.eqout := a === b
-  io.noteqout := (a != b)
+  io.noteqout := (a =/= b)
   io.lesseqout := a <= b
   io.greateqout := a >= b
   // io.negout := -a(15, 0).toSInt
diff --git a/src/test/scala/chiselTests/Tbl.scala b/src/test/scala/chiselTests/Tbl.scala
index b938361f..c09189e6 100644
--- a/src/test/scala/chiselTests/Tbl.scala
+++ b/src/test/scala/chiselTests/Tbl.scala
@@ -30,8 +30,8 @@ class Tbl(w: Int, n: Int) extends Module {
 class TblTester(w: Int, n: Int, idxs: List[Int], values: List[Int]) extends BasicTester {
   val (cnt, wrap) = Counter(true.B, idxs.size)
   val dut = Module(new Tbl(w, n))
-  val vvalues = Vec(values.map(_.asUInt))
-  val vidxs = Vec(idxs.map(_.asUInt))
+  val vvalues = VecInit(values.map(_.asUInt))
+  val vidxs = VecInit(idxs.map(_.asUInt))
   val prev_idx = vidxs(cnt - 1.U)
   val prev_value = vvalues(cnt - 1.U)
   dut.io.wi := vidxs(cnt)
diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index bf25ed82..395624f7 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -21,7 +21,7 @@ class RegTesterMod(vecSize: Int) extends Module {
     val in = Input(Vec(vecSize, UInt()))
     val out = Output(Vec(vecSize, UInt()))
   })
-  val vecReg = RegNext(io.in, Vec(Seq.fill(vecSize){0.U}))
+  val vecReg = RegNext(io.in, VecInit(Seq.fill(vecSize){0.U}))
   io.out := vecReg
 }
 
@@ -50,7 +50,7 @@ class LitTester(w: Int, values: List[Int]) extends BasicTester {
 }
 
 class RegTester(w: Int, values: List[Int]) extends BasicTester {
-  val v = Vec(values.map(_.U(w.W)))
+  val v = VecInit(values.map(_.U(w.W)))
   val dut = Module(new RegTesterMod(values.length))
   val doneReg = RegInit(false.B)
   dut.io.in := v
@@ -66,7 +66,7 @@ class RegTester(w: Int, values: List[Int]) extends BasicTester {
 }
 
 class IOTester(w: Int, values: List[Int]) extends BasicTester {
-  val v = Vec(values.map(_.U(w.W))) // Does this need a Wire? No. It's a Vec of Lits and hence synthesizeable.
+  val v = VecInit(values.map(_.U(w.W))) // Does this need a Wire? No. It's a Vec of Lits and hence synthesizeable.
   val dut = Module(new IOTesterMod(values.length))
   dut.io.in := v
   for ((a,b) <- dut.io.out.zip(values)) {
@@ -86,7 +86,7 @@ class IOTesterModFill(vecSize: Int) extends Module {
 }
 
 class ValueTester(w: Int, values: List[Int]) extends BasicTester {
-  val v = Vec(values.map(_.asUInt(w.W)))
+  val v = VecInit(values.map(_.asUInt(w.W)))
   for ((a,b) <- v.zip(values)) {
     assert(a === b.asUInt)
   }
@@ -94,9 +94,9 @@ class ValueTester(w: Int, values: List[Int]) extends BasicTester {
 }
 
 class TabulateTester(n: Int) extends BasicTester {
-  val v = Vec(Range(0, n).map(i => (i*2).asUInt))
-  val x = Vec(Array.tabulate(n){ i => (i*2).asUInt })
-  val u = Vec.tabulate(n)(i => (i*2).asUInt)
+  val v = VecInit(Range(0, n).map(i => (i*2).asUInt))
+  val x = VecInit(Array.tabulate(n){ i => (i*2).asUInt })
+  val u = VecInit.tabulate(n)(i => (i*2).asUInt)
 
   assert(v.asUInt() === x.asUInt())
   assert(v.asUInt() === u.asUInt())
diff --git a/src/test/scala/cookbook/FSM.scala b/src/test/scala/cookbook/FSM.scala
index 9cc0ef2a..22cf8059 100644
--- a/src/test/scala/cookbook/FSM.scala
+++ b/src/test/scala/cookbook/FSM.scala
@@ -47,8 +47,8 @@ class DetectTwoOnesTester extends CookbookTester(10) {
   val dut = Module(new DetectTwoOnes)
 
   // Inputs and expected results
-  val inputs: Vec[Bool] = Vec(false.B, true.B, false.B, true.B, true.B, true.B, false.B, true.B, true.B, false.B)
-  val expected: Vec[Bool] = Vec(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
+  val inputs: Vec[Bool] = VecInit(false.B, true.B, false.B, true.B, true.B, true.B, false.B, true.B, true.B, false.B)
+  val expected: Vec[Bool] = VecInit(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
 
   dut.io.in := inputs(cycle)
   assert(dut.io.out === expected(cycle))
diff --git a/src/test/scala/cookbook/RegOfVec.scala b/src/test/scala/cookbook/RegOfVec.scala
index ba784871..fee7f2e1 100644
--- a/src/test/scala/cookbook/RegOfVec.scala
+++ b/src/test/scala/cookbook/RegOfVec.scala
@@ -19,7 +19,7 @@ class RegOfVec extends CookbookTester(2) {
   //   Note that Seq.fill constructs 4 32-bit UInt literals with the value 0
   //   Vec(...) then constructs a Wire of these literals
   //   The Reg is then initialized to the value of the Wire (which gives it the same type)
-  val initRegOfVec = RegInit(Vec(Seq.fill(4)(0.U(32.W))))
+  val initRegOfVec = RegInit(VecInit(Seq.fill(4)(0.U(32.W))))
 
   // Simple test (cycle comes from superclass)
   when (cycle === 2.U) { assert(regOfVec(2) === 123.U) }
diff --git a/src/test/scala/cookbook/UInt2VecOfBool.scala b/src/test/scala/cookbook/UInt2VecOfBool.scala
index 96b2da5a..f69c483a 100644
--- a/src/test/scala/cookbook/UInt2VecOfBool.scala
+++ b/src/test/scala/cookbook/UInt2VecOfBool.scala
@@ -12,7 +12,7 @@ import chisel3._
 class UInt2VecOfBool extends CookbookTester(1) {
   // Example
   val uint = 0xc.U
-  val vec = Vec(uint.toBools)
+  val vec = VecInit(uint.toBools)
   printf(p"$vec") // Vec(0, 0, 1, 1)
 
   // Test
diff --git a/src/test/scala/cookbook/VecOfBool2UInt.scala b/src/test/scala/cookbook/VecOfBool2UInt.scala
index 40faca30..5780154e 100644
--- a/src/test/scala/cookbook/VecOfBool2UInt.scala
+++ b/src/test/scala/cookbook/VecOfBool2UInt.scala
@@ -10,10 +10,10 @@ import chisel3._
  */
 class VecOfBool2UInt extends CookbookTester(1) {
   // Example
-  val vec = Vec(true.B, false.B, true.B, true.B)
+  val vec = VecInit(true.B, false.B, true.B, true.B)
   val uint = vec.asUInt
   printf(p"$uint") // 13
-  
+
   /* Test
    *
    * (remember leftmost Bool in Vec is low order bit)
diff --git a/src/test/scala/examples/SimpleVendingMachine.scala b/src/test/scala/examples/SimpleVendingMachine.scala
index a34a7051..4bb6027a 100644
--- a/src/test/scala/examples/SimpleVendingMachine.scala
+++ b/src/test/scala/examples/SimpleVendingMachine.scala
@@ -75,9 +75,9 @@ class SimpleVendingMachineTester(mod: => SimpleVendingMachine) extends BasicTest
   val (cycle, done) = Counter(true.B, 10)
   when (done) { stop(); stop() } // Stop twice because of Verilator
 
-  val nickelInputs = Vec(true.B, true.B, true.B, true.B, true.B, false.B, false.B, false.B, true.B, false.B)
-  val dimeInputs   = Vec(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
-  val expected     = Vec(false.B, false.B, false.B, false.B, true.B , false.B, false.B, true.B, false.B, false.B)
+  val nickelInputs = VecInit(true.B, true.B, true.B, true.B, true.B, false.B, false.B, false.B, true.B, false.B)
+  val dimeInputs   = VecInit(false.B, false.B, false.B, false.B, false.B, true.B, true.B, false.B, false.B, true.B)
+  val expected     = VecInit(false.B, false.B, false.B, false.B, true.B , false.B, false.B, true.B, false.B, false.B)
 
   dut.io.nickel := nickelInputs(cycle)
   dut.io.dime := dimeInputs(cycle)
diff --git a/src/test/scala/examples/VendingMachineGenerator.scala b/src/test/scala/examples/VendingMachineGenerator.scala
index 0a9dc3e6..c222ca07 100644
--- a/src/test/scala/examples/VendingMachineGenerator.scala
+++ b/src/test/scala/examples/VendingMachineGenerator.scala
@@ -84,11 +84,11 @@ class ParameterizedVendingMachineTester(
   val inputs: Seq[Option[Coin]] = Seq.fill(testLength)(coins.lift(_rand.nextInt(coins.size + 1)))
   val expected: Seq[Boolean] = getExpectedResults(inputs, dut.sodaCost)
 
-  val inputVec: Vec[UInt] = Vec(inputs map {
+  val inputVec: Vec[UInt] = VecInit(inputs map {
     case Some(coin) => (1 << dut.io.indexMap(coin.name)).asUInt(coins.size.W)
     case None => 0.asUInt(coins.size.W)
   })
-  val expectedVec: Vec[Bool] = Vec(expected map (_.B))
+  val expectedVec: Vec[Bool] = VecInit(expected map (_.B))
 
   val (idx, done) = Counter(true.B, testLength + 1)
   when (done) { stop(); stop() } // Two stops for Verilator