summaryrefslogtreecommitdiff
path: root/src/test/scala/chiselTests/util/BitPatSpec.scala
diff options
context:
space:
mode:
authorJack2021-12-18 08:27:38 +0000
committerJack2021-12-18 08:27:38 +0000
commitdd9ad534771247ac16eaa47eb9794102736b5102 (patch)
treed4566d317cb8526b79017de1e438aea8217dd1d4 /src/test/scala/chiselTests/util/BitPatSpec.scala
parent440edc4436fb3a8a4175ae425a0d31c4997ee60f (diff)
parentf50f74f583fba7b98e550c440df091e559ce32b8 (diff)
Merge branch 'master' into 3.5-release
Diffstat (limited to 'src/test/scala/chiselTests/util/BitPatSpec.scala')
-rw-r--r--src/test/scala/chiselTests/util/BitPatSpec.scala10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/util/BitPatSpec.scala b/src/test/scala/chiselTests/util/BitPatSpec.scala
index 0c83493f..549e8bca 100644
--- a/src/test/scala/chiselTests/util/BitPatSpec.scala
+++ b/src/test/scala/chiselTests/util/BitPatSpec.scala
@@ -24,10 +24,18 @@ class BitPatSpec extends AnyFlatSpec with Matchers {
intercept[IllegalArgumentException]{BitPat("b")}
}
- it should "contact BitPat via ##" in {
+ it should "concat BitPat via ##" in {
(BitPat.Y(4) ## BitPat.dontCare(3) ## BitPat.N(2)).toString should be (s"BitPat(1111???00)")
}
+ it should "throw when BitPat apply to a Hardware" in {
+ intercept[java.lang.IllegalArgumentException]{
+ chisel3.stage.ChiselStage.emitChirrtl(new chisel3.Module {
+ BitPat(chisel3.Reg(chisel3.Bool()))
+ })
+ }
+ }
+
it should "index and return new BitPat" in {
val b = BitPat("b1001???")
b(0) should be(BitPat.dontCare(1))