diff options
| author | Jack Koenig | 2022-01-10 10:39:52 -0800 |
|---|---|---|
| committer | Jack Koenig | 2022-01-10 15:53:55 -0800 |
| commit | 3131c0daad41dea78bede4517669e376c41a325a (patch) | |
| tree | 55baed78a6a01f80ff3952a08233ca553a19964f /src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala | |
| parent | dd36f97a82746cec0b25b94651581fe799e24579 (diff) | |
Apply scalafmt
Command:
sbt scalafmtAll
Diffstat (limited to 'src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala b/src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala index ffe3a37f..64aabb4b 100644 --- a/src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala +++ b/src/test/scala/chiselTests/experimental/ProgrammaticPortsSpec.scala @@ -63,7 +63,7 @@ class ProgrammaticPortsSpec extends ChiselFlatSpec with Utils { } "SuggestName collisions on ports" should "be illegal" in { - a [ChiselException] should be thrownBy extractCause[ChiselException] { + a[ChiselException] should be thrownBy extractCause[ChiselException] { ChiselStage.elaborate(new Module { val foo = IO(UInt(8.W)).suggestName("apple") val bar = IO(UInt(8.W)).suggestName("apple") |