diff options
| author | Jack | 2023-01-08 04:47:27 +0000 |
|---|---|---|
| committer | Jack | 2023-01-08 04:47:27 +0000 |
| commit | 5aa60ecda6bd2b02dfc7253a47e53c7647981a5c (patch) | |
| tree | 53ea2570c4af7824d6203e0c0cd7953c1ba4910c /src/test/scala/chiselTests/experimental/FlatIOSpec.scala | |
| parent | a50a5a287a23ba6b833b13d8cec84dd5dfe0fc61 (diff) | |
| parent | 116210ff806ccdda91b4c3343f78bad66783d0e6 (diff) | |
Merge branch '3.5.x' into 3.5-release
Diffstat (limited to 'src/test/scala/chiselTests/experimental/FlatIOSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/experimental/FlatIOSpec.scala | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/test/scala/chiselTests/experimental/FlatIOSpec.scala b/src/test/scala/chiselTests/experimental/FlatIOSpec.scala index ebb7cbdb..fb3f64c7 100644 --- a/src/test/scala/chiselTests/experimental/FlatIOSpec.scala +++ b/src/test/scala/chiselTests/experimental/FlatIOSpec.scala @@ -55,9 +55,11 @@ class FlatIOSpec extends ChiselFlatSpec { val bar = Analog(8.W) } class MyModule extends RawModule { - val in = IO(Flipped(new MyBundle)) - val out = IO(new MyBundle) - out <> in + val io = FlatIO(new Bundle { + val in = Flipped(new MyBundle) + val out = new MyBundle + }) + io.out <> io.in } val chirrtl = emitChirrtl(new MyModule) chirrtl should include("out.foo <= in.foo") |
