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authorJim Lawson2016-06-21 10:13:51 -0700
committerJim Lawson2016-06-21 10:13:51 -0700
commit083610b2faa456dfccc4365dd115565d36e522fa (patch)
tree40df9237ddc8789f24d924c0cfa63a066fcc1f1c /src/test/scala/chiselTests/VectorPacketIO.scala
parentd675043717593fb7e96fb0f1952debbeb7f20a57 (diff)
Most of the remaining tests with Module, IO wrapping.
Diffstat (limited to 'src/test/scala/chiselTests/VectorPacketIO.scala')
-rw-r--r--src/test/scala/chiselTests/VectorPacketIO.scala9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/test/scala/chiselTests/VectorPacketIO.scala b/src/test/scala/chiselTests/VectorPacketIO.scala
index 99ec66a6..936541c0 100644
--- a/src/test/scala/chiselTests/VectorPacketIO.scala
+++ b/src/test/scala/chiselTests/VectorPacketIO.scala
@@ -27,8 +27,8 @@ class Packet extends Bundle {
* The problem does not occur if the Vec is taken out
*/
class VectorPacketIO(n: Int) extends Bundle {
- val ins = Vec(n, new DeqIO(new Packet()))
- val outs = Vec(n, new EnqIO(new Packet()))
+ val ins = Vec(n, DeqIO(new Packet()))
+ val outs = Vec(n, EnqIO(new Packet()))
}
/**
@@ -37,10 +37,11 @@ class VectorPacketIO(n: Int) extends Bundle {
*/
class BrokenVectorPacketModule extends Module {
val n = 4
- val io = new VectorPacketIO(n)
+ val io = IO(new VectorPacketIO(n))
/* the following method of initializing the circuit may change in the future */
- io.outs.foreach(_.init())
+ io.ins.foreach(_.noenq())
+ io.outs.foreach(_.nodeq())
}
class VectorPacketIOUnitTester extends BasicTester {