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authorJim Lawson2016-10-06 08:57:10 -0700
committerJim Lawson2016-10-06 08:57:10 -0700
commit82625071405672eb4a19363d6f73f359ac28a7f5 (patch)
treedee5beff0e7333fa86c1cdcdb79c0d111114b8c9 /src/test/scala/chiselTests/Padding.scala
parentb7c6e0d1a2098b545938a5a8dfce2b1d9294532f (diff)
parent7de30c2b893a3f24d43f2e131557430eb64f6bc8 (diff)
Merge branch 'master' into tobits-deprecation
Diffstat (limited to 'src/test/scala/chiselTests/Padding.scala')
-rw-r--r--src/test/scala/chiselTests/Padding.scala13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/test/scala/chiselTests/Padding.scala b/src/test/scala/chiselTests/Padding.scala
index 999b7d36..42df6802 100644
--- a/src/test/scala/chiselTests/Padding.scala
+++ b/src/test/scala/chiselTests/Padding.scala
@@ -1,14 +1,15 @@
// See LICENSE for license details.
package chiselTests
-import Chisel._
+
+import chisel3._
class Padder extends Module {
- val io = new Bundle {
- val a = Bits(INPUT, 4)
- val asp = SInt(OUTPUT, 8)
- val aup = UInt(OUTPUT, 8)
- }
+ val io = IO(new Bundle {
+ val a = Input(UInt.width(4))
+ val asp = Output(SInt.width(8))
+ val aup = Output(UInt.width(8))
+ })
io.asp := io.a.asSInt
io.aup := io.a.asUInt
}