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authorJim Lawson2016-10-06 08:57:10 -0700
committerJim Lawson2016-10-06 08:57:10 -0700
commit82625071405672eb4a19363d6f73f359ac28a7f5 (patch)
treedee5beff0e7333fa86c1cdcdb79c0d111114b8c9 /src/test/scala/chiselTests/ModuleExplicitResetSpec.scala
parentb7c6e0d1a2098b545938a5a8dfce2b1d9294532f (diff)
parent7de30c2b893a3f24d43f2e131557430eb64f6bc8 (diff)
Merge branch 'master' into tobits-deprecation
Diffstat (limited to 'src/test/scala/chiselTests/ModuleExplicitResetSpec.scala')
-rw-r--r--src/test/scala/chiselTests/ModuleExplicitResetSpec.scala38
1 files changed, 38 insertions, 0 deletions
diff --git a/src/test/scala/chiselTests/ModuleExplicitResetSpec.scala b/src/test/scala/chiselTests/ModuleExplicitResetSpec.scala
new file mode 100644
index 00000000..f8206b9c
--- /dev/null
+++ b/src/test/scala/chiselTests/ModuleExplicitResetSpec.scala
@@ -0,0 +1,38 @@
+// See LICENSE for license details.
+
+package chiselTests
+
+class ModuleExplicitResetSpec extends ChiselFlatSpec {
+
+ "A Module with an explicit reset in compatibility mode" should "elaborate" in {
+ import Chisel._
+ val myReset = Bool(true)
+ class ModuleExplicitReset(reset: Bool) extends Module(_reset = reset) {
+ val io = new Bundle {
+ val done = Bool(OUTPUT)
+ }
+
+ io.done := Bool(false)
+ }
+
+ elaborate {
+ new ModuleExplicitReset(myReset)
+ }
+ }
+
+ "A Module with an explicit reset in non-compatibility mode" should "elaborate" in {
+ import chisel3._
+ val myReset = Bool(true)
+ class ModuleExplicitReset(reset: Bool) extends Module(_reset = reset) {
+ val io = IO(new Bundle {
+ val done = Bool(OUTPUT)
+ })
+
+ io.done := Bool(false)
+ }
+
+ elaborate {
+ new ModuleExplicitReset(myReset)
+ }
+ }
+}