diff options
| author | Martin Schoeberl | 2019-01-25 23:24:01 -0800 |
|---|---|---|
| committer | Richard Lin | 2019-01-25 23:24:01 -0800 |
| commit | 5509cdd4c8332c53151e10ba5bdbe0684af1c05b (patch) | |
| tree | 15f4a7e8f83e0d249918bbce4198160fb2c5360f /src/test/scala/chiselTests/MixedVecSpec.scala | |
| parent | 4f5ec211cb59f9da37dbe91d0dfcb93c4d3d84c9 (diff) | |
WireDefault instead of WireInit, keep WireInit around (#986)
Diffstat (limited to 'src/test/scala/chiselTests/MixedVecSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/MixedVecSpec.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/MixedVecSpec.scala b/src/test/scala/chiselTests/MixedVecSpec.scala index 0e4cc3e7..3bedf87f 100644 --- a/src/test/scala/chiselTests/MixedVecSpec.scala +++ b/src/test/scala/chiselTests/MixedVecSpec.scala @@ -69,7 +69,7 @@ class MixedVecZeroEntryTester extends BasicTester { val io = IO(Output(bundleWithZeroEntryVec)) io.foo := false.B }) - WireInit(m.io.bar) + WireDefault(m.io.bar) stop() } |