diff options
| author | Jim Lawson | 2016-06-21 10:13:51 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-06-21 10:13:51 -0700 |
| commit | 083610b2faa456dfccc4365dd115565d36e522fa (patch) | |
| tree | 40df9237ddc8789f24d924c0cfa63a066fcc1f1c /src/test/scala/chiselTests/MemorySearch.scala | |
| parent | d675043717593fb7e96fb0f1952debbeb7f20a57 (diff) | |
Most of the remaining tests with Module, IO wrapping.
Diffstat (limited to 'src/test/scala/chiselTests/MemorySearch.scala')
| -rw-r--r-- | src/test/scala/chiselTests/MemorySearch.scala | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/test/scala/chiselTests/MemorySearch.scala b/src/test/scala/chiselTests/MemorySearch.scala index 55b704a0..a321522b 100644 --- a/src/test/scala/chiselTests/MemorySearch.scala +++ b/src/test/scala/chiselTests/MemorySearch.scala @@ -5,12 +5,12 @@ import Chisel._ import Chisel.testers.BasicTester class MemorySearch extends Module { - val io = new Bundle { - val target = UInt(INPUT, 4) - val en = Bool(INPUT) - val done = Bool(OUTPUT) - val address = UInt(OUTPUT, 3) - } + val io = IO(new Bundle { + val target = Input(UInt(4)) + val en = Input(Bool()) + val done = Output(Bool()) + val address = Output(UInt(3)) + }) val vals = Array(0, 4, 15, 14, 2, 5, 13) val index = Reg(init = UInt(0, width = 3)) val elts = Vec(vals.map(UInt(_,4))) |
