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| author | chick | 2017-03-28 00:06:45 -0700 |
|---|---|---|
| committer | chick | 2017-03-28 00:06:45 -0700 |
| commit | 19e16642cb99fbb4707ce23fa4df56963e3d39b6 (patch) | |
| tree | a60cd7d52d596d61eab9ae5bfe3b08c471c8b481 /src/test/scala/chiselTests/FixedPointSpec.scala | |
| parent | 8e4ddc62db448b613ae327792e72defca4d115d4 (diff) | |
Creating FixedPoint literals was throwing away width when specifically provided.
This caused one hot muxing problems in dsptools
FixedPoint spec fixed based on error uncovered by this change
Diffstat (limited to 'src/test/scala/chiselTests/FixedPointSpec.scala')
| -rw-r--r-- | src/test/scala/chiselTests/FixedPointSpec.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/chiselTests/FixedPointSpec.scala b/src/test/scala/chiselTests/FixedPointSpec.scala index 5047ac62..76a89e6a 100644 --- a/src/test/scala/chiselTests/FixedPointSpec.scala +++ b/src/test/scala/chiselTests/FixedPointSpec.scala @@ -79,7 +79,7 @@ class FixedPointFromBitsTester extends BasicTester { } class FixedPointMuxTester extends BasicTester { - val largeWidthLowPrecision = 6.0.F(3.W, 0.BP) + val largeWidthLowPrecision = 6.0.F(4.W, 0.BP) val smallWidthHighPrecision = 0.25.F(2.W, 2.BP) val unknownWidthLowPrecision = 6.0.F(0.BP) val unknownFixed = Wire(FixedPoint()) |