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authorAlbert Magyar2020-07-20 12:11:44 -0700
committerAlbert Magyar2020-07-21 13:06:53 -0700
commit7e9f424fb7dcd11c894ceb9f6f049fd9eda80632 (patch)
tree1fa15e357d0af7b82316fa2ee659e2e98118488c /src/test/scala/chiselTests/CompatibilitySpec.scala
parent4a0e828cfe76e0d3bd6c4a0cc593589fe74ed0ba (diff)
Delete outdated scalastyle configuration comments from source
Diffstat (limited to 'src/test/scala/chiselTests/CompatibilitySpec.scala')
-rw-r--r--src/test/scala/chiselTests/CompatibilitySpec.scala4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/test/scala/chiselTests/CompatibilitySpec.scala b/src/test/scala/chiselTests/CompatibilitySpec.scala
index 09ec40ee..183540af 100644
--- a/src/test/scala/chiselTests/CompatibilitySpec.scala
+++ b/src/test/scala/chiselTests/CompatibilitySpec.scala
@@ -60,7 +60,7 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
val value: Int = Gen.choose(2, 2048).sample.get
log2Up(value) shouldBe (1 max BigInt(value - 1).bitLength)
log2Ceil(value) shouldBe (BigInt(value - 1).bitLength)
- log2Down(value) shouldBe ((1 max BigInt(value - 1).bitLength) - (if (value > 0 && ((value & (value - 1)) == 0)) 0 else 1)) // scalastyle:ignore line.size.limit
+ log2Down(value) shouldBe ((1 max BigInt(value - 1).bitLength) - (if (value > 0 && ((value & (value - 1)) == 0)) 0 else 1))
log2Floor(value) shouldBe (BigInt(value - 1).bitLength - (if (value > 0 && ((value & (value - 1)) == 0)) 0 else 1))
isPow2(BigInt(1) << value) shouldBe true
isPow2((BigInt(1) << value) - 1) shouldBe false
@@ -201,7 +201,6 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
override def cloneType: this.type = (new BigBundle).asInstanceOf[this.type]
}
- // scalastyle:off line.size.limit
"A Module with missing bundle fields when compiled with the Chisel compatibility package" should "not throw an exception" in {
class ConnectFieldMismatchModule extends Module {
@@ -348,7 +347,6 @@ class CompatibiltySpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyCheck
Chisel.assert(io.bar.dir == INPUT)
})
}
- // scalastyle:on line.size.limit
behavior of "BitPat"