diff options
| author | Jim Lawson | 2017-02-28 13:32:38 -0800 |
|---|---|---|
| committer | GitHub | 2017-02-28 13:32:38 -0800 |
| commit | 08885d74619328532bc0157ba9cef7f26496b146 (patch) | |
| tree | 53bd3bd7b4d0b27256700f70b689013a4484674f /src/test/scala/chiselTests/AnnotationNoDedup.scala | |
| parent | cae110e06d7dfb206e6d50565ee25221b8c6d0a5 (diff) | |
Use test_run_dir for more tests. (#534)
* Use test_run_dir for more tests.
* Use official option and DRY.
Make "test_run_dir" the default for ChiselSpec.
Verify output files are created in DriverSpec tests.
Diffstat (limited to 'src/test/scala/chiselTests/AnnotationNoDedup.scala')
| -rw-r--r-- | src/test/scala/chiselTests/AnnotationNoDedup.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/test/scala/chiselTests/AnnotationNoDedup.scala b/src/test/scala/chiselTests/AnnotationNoDedup.scala index 7c7c0583..93167f69 100644 --- a/src/test/scala/chiselTests/AnnotationNoDedup.scala +++ b/src/test/scala/chiselTests/AnnotationNoDedup.scala @@ -50,7 +50,7 @@ class UsesMuchUsedModule(addAnnos: Boolean) extends Module with NoDedupAnnotator class AnnotationNoDedup extends FreeSpec with Matchers { "Firrtl provides transform that reduces identical modules to a single instance" - { "Annotations can be added which will defeat this deduplication for specific modules instances" in { - Driver.execute(Array("-X", "low"), () => new UsesMuchUsedModule(addAnnos = true)) match { + Driver.execute(Array("-X", "low", "--target-dir", "test_run_dir"), () => new UsesMuchUsedModule(addAnnos = true)) match { case ChiselExecutionSuccess(_, _, Some(firrtlResult: FirrtlExecutionSuccess)) => val lowFirrtl = firrtlResult.emitted @@ -63,7 +63,7 @@ class AnnotationNoDedup extends FreeSpec with Matchers { } } "Turning off these nnotations dedup all the occurrences" in { - Driver.execute(Array("-X", "low"), () => new UsesMuchUsedModule(addAnnos = false)) match { + Driver.execute(Array("-X", "low", "--target-dir", "test_run_dir"), () => new UsesMuchUsedModule(addAnnos = false)) match { case ChiselExecutionSuccess(_, _, Some(firrtlResult: FirrtlExecutionSuccess)) => val lowFirrtl = firrtlResult.emitted |