Incorporate chisel3-tests; update Makefile.

1 files changed, 30 insertions, 0 deletions

diff --git a/src/test/scala/ChiselTests/ModuleWire.scala b/src/test/scala/ChiselTests/ModuleWire.scala
new file mode 100644
index 00000000..13e74a06
--- /dev/null
+++ b/src/test/scala/ChiselTests/ModuleWire.scala
@@ -0,0 +1,30 @@
+package ChiselTests
+import Chisel._
+
+class Inc extends Module {
+  val io = new Bundle {
+    val in  = UInt(INPUT,  32)
+    val out = UInt(OUTPUT, 32)
+  }
+  io.out := io.in + UInt(1)
+}
+
+class ModuleWire extends Module {
+  val io = new Bundle {
+    val in  = UInt(INPUT,  32)
+    val out = UInt(OUTPUT, 32)
+  }
+  val inc = Module(new Inc).io 
+  inc.in := io.in
+  io.out := inc.out 
+}
+
+
+class ModuleWireTester(c: ModuleWire) extends Tester(c) {
+  for (t <- 0 until 16) {
+    val test_in = rnd.nextInt(256)
+    poke(c.io.in, test_in)
+    step(1)
+    expect(c.io.out, test_in + 1)
+  }
+}