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| author | Andrew Waterman | 2015-07-28 23:54:33 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2015-07-28 23:54:33 -0700 |
| commit | 6035ab90f10057561c679156a09087d638bf6cc9 (patch) | |
| tree | 06ccd74b8d47faebc52dae0d1ed51d0fd38962b9 /src/test/scala/ChiselTests/ModuleVec.scala | |
| parent | 6b272324836f9b53c9953f538def080975cb4a93 (diff) | |
toBits and fromBits must be inverse operations
For Vec and Bundle, toBits and fromBits got the flattening order wrong
and so weren't inverses of each other.
Diffstat (limited to 'src/test/scala/ChiselTests/ModuleVec.scala')
0 files changed, 0 insertions, 0 deletions