diff options
| author | Jim Lawson | 2020-01-21 15:15:10 -0800 |
|---|---|---|
| committer | GitHub | 2020-01-21 15:15:10 -0800 |
| commit | d70543a2bd74c2bde5abb114b946750b46a39d25 (patch) | |
| tree | a2177d93b2d1973cf42673d552114c9ee2269179 /src/main | |
| parent | c4aa70f64ad5ecd8a5557ad0e4777f245768d865 (diff) | |
| parent | c7715c160a0dd07765e736b813c8b6b26b27de28 (diff) | |
Merge branch 'master' into add-asbool-to-clock
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/chisel3/aop/Select.scala | 7 | ||||
| -rw-r--r-- | src/main/scala/chisel3/stage/ChiselStage.scala | 2 |
2 files changed, 6 insertions, 3 deletions
diff --git a/src/main/scala/chisel3/aop/Select.scala b/src/main/scala/chisel3/aop/Select.scala index 612cdcc7..390f82a5 100644 --- a/src/main/scala/chisel3/aop/Select.scala +++ b/src/main/scala/chisel3/aop/Select.scala @@ -80,8 +80,11 @@ object Select { */ def instances(module: BaseModule): Seq[BaseModule] = { check(module) - module._component.get.asInstanceOf[DefModule].commands.collect { - case i: DefInstance => i.id + module._component.get match { + case d: DefModule => d.commands.collect { + case i: DefInstance => i.id + } + case other => Nil } } diff --git a/src/main/scala/chisel3/stage/ChiselStage.scala b/src/main/scala/chisel3/stage/ChiselStage.scala index 0a0cc47c..df23f97d 100644 --- a/src/main/scala/chisel3/stage/ChiselStage.scala +++ b/src/main/scala/chisel3/stage/ChiselStage.scala @@ -16,7 +16,7 @@ import java.io.{StringWriter, PrintWriter} class ChiselStage extends Stage with PreservesAll[Phase] { val shell: Shell = new Shell("chisel") with ChiselCli with FirrtlCli - val targets = + val targets: Seq[PhaseManager.PhaseDependency] = Seq( classOf[chisel3.stage.phases.Checks], classOf[chisel3.stage.phases.Elaborate], classOf[chisel3.stage.phases.AddImplicitOutputFile], |