Get cleanup to compile

3 files changed, 5 insertions, 158 deletions

diff --git a/src/main/scala/chisel3/util/BlackBoxUtils.scala b/src/main/scala/chisel3/util/BlackBoxUtils.scala
deleted file mode 100644
index 579a6307..00000000
--- a/src/main/scala/chisel3/util/BlackBoxUtils.scala
+++ /dev/null
@@ -1,89 +0,0 @@
-// SPDX-License-Identifier: Apache-2.0
-
-package chisel3.util
-
-import chisel3._
-import chisel3.experimental.{ChiselAnnotation, RunFirrtlTransform}
-import firrtl.transforms.{BlackBoxInlineAnno, BlackBoxNotFoundException, BlackBoxPathAnno, BlackBoxSourceHelper}
-import firrtl.annotations.ModuleName
-import logger.LazyLogging
-
-private[util] object BlackBoxHelpers {
-
-  implicit class BlackBoxInlineAnnoHelpers(anno: BlackBoxInlineAnno.type) extends LazyLogging {
-
-    /** Generate a BlackBoxInlineAnno from a Java Resource and a module name. */
-    def fromResource(resourceName: String, moduleName: ModuleName) = try {
-      val blackBoxFile = os.resource / os.RelPath(resourceName.dropWhile(_ == '/'))
-      val contents = os.read(blackBoxFile)
-      if (contents.size > BigInt(2).pow(20)) {
-        val message =
-          s"Black box resource $resourceName, which will be converted to an inline annotation, is greater than 1 MiB." +
-            "This may affect compiler performance. Consider including this resource via a black box path."
-        logger.warn(message)
-      }
-      BlackBoxInlineAnno(moduleName, blackBoxFile.last, contents)
-    } catch {
-      case e: os.ResourceNotFoundException =>
-        throw new BlackBoxNotFoundException(resourceName, e.getMessage)
-    }
-  }
-}
-
-import BlackBoxHelpers._
-
-trait HasBlackBoxResource extends BlackBox {
-  self: BlackBox =>
-
-  /** Copies a Java resource containing some text into the output directory. This is typically used to copy a Verilog file
-    * to the final output directory, but may be used to copy any Java resource (e.g., a C++ testbench).
-    *
-    * Resource files are located in project_root/src/main/resources/.
-    * Example of adding the resource file project_root/src/main/resources/blackbox.v:
-    * {{{
-    * addResource("/blackbox.v")
-    * }}}
-    */
-  def addResource(blackBoxResource: String): Unit = {
-    val anno = new ChiselAnnotation with RunFirrtlTransform {
-      def toFirrtl = BlackBoxInlineAnno.fromResource(blackBoxResource, self.toNamed)
-      def transformClass = classOf[BlackBoxSourceHelper]
-    }
-    chisel3.experimental.annotate(anno)
-  }
-}
-
-trait HasBlackBoxInline extends BlackBox {
-  self: BlackBox =>
-
-  /** Creates a black box verilog file, from the contents of a local string
-    *
-    * @param blackBoxName   The black box module name, to create filename
-    * @param blackBoxInline The black box contents
-    */
-  def setInline(blackBoxName: String, blackBoxInline: String): Unit = {
-    val anno = new ChiselAnnotation with RunFirrtlTransform {
-      def toFirrtl = BlackBoxInlineAnno(self.toNamed, blackBoxName, blackBoxInline)
-      def transformClass = classOf[BlackBoxSourceHelper]
-    }
-    chisel3.experimental.annotate(anno)
-  }
-}
-
-trait HasBlackBoxPath extends BlackBox {
-  self: BlackBox =>
-
-  /** Copies a file to the target directory
-    *
-    * This works with absolute and relative paths. Relative paths are relative
-    * to the current working directory, which is generally not the same as the
-    * target directory.
-    */
-  def addPath(blackBoxPath: String): Unit = {
-    val anno = new ChiselAnnotation with RunFirrtlTransform {
-      def toFirrtl = BlackBoxPathAnno(self.toNamed, blackBoxPath)
-      def transformClass = classOf[BlackBoxSourceHelper]
-    }
-    chisel3.experimental.annotate(anno)
-  }
-}
diff --git a/src/main/scala/chisel3/util/ExtModuleUtils.scala b/src/main/scala/chisel3/util/ExtModuleUtils.scala
deleted file mode 100644
index 8a687d36..00000000
--- a/src/main/scala/chisel3/util/ExtModuleUtils.scala
+++ /dev/null
@@ -1,63 +0,0 @@
-// See LICENSE for license details.
-
-package chisel3.util
-
-import chisel3.experimental.{ChiselAnnotation, ExtModule, RunFirrtlTransform}
-import firrtl.transforms.{BlackBoxInlineAnno, BlackBoxNotFoundException, BlackBoxPathAnno, BlackBoxSourceHelper}
-
-import BlackBoxHelpers._
-
-trait HasExtModuleResource extends ExtModule {
-  self: ExtModule =>
-
-  /** Copies a resource file to the target directory
-    *
-    * Resource files are located in project_root/src/main/resources/.
-    * Example of adding the resource file project_root/src/main/resources/blackbox.v:
-    * {{{
-    * addResource("/blackbox.v")
-    * }}}
-    */
-  def addResource(blackBoxResource: String): Unit = {
-    val anno = new ChiselAnnotation with RunFirrtlTransform {
-      def toFirrtl = BlackBoxInlineAnno.fromResource(blackBoxResource, self.toNamed)
-      def transformClass = classOf[BlackBoxSourceHelper]
-    }
-    chisel3.experimental.annotate(anno)
-  }
-}
-
-trait HasExtModuleInline extends ExtModule {
-  self: ExtModule =>
-
-  /** Creates a black box verilog file, from the contents of a local string
-    *
-    * @param blackBoxName   The black box module name, to create filename
-    * @param blackBoxInline The black box contents
-    */
-  def setInline(blackBoxName: String, blackBoxInline: String): Unit = {
-    val anno = new ChiselAnnotation with RunFirrtlTransform {
-      def toFirrtl = BlackBoxInlineAnno(self.toNamed, blackBoxName, blackBoxInline)
-      def transformClass = classOf[BlackBoxSourceHelper]
-    }
-    chisel3.experimental.annotate(anno)
-  }
-}
-
-trait HasExtModulePath extends ExtModule {
-  self: ExtModule =>
-
-  /** Copies a file to the target directory
-    *
-    * This works with absolute and relative paths. Relative paths are relative
-    * to the current working directory, which is generally not the same as the
-    * target directory.
-    */
-  def addPath(blackBoxPath: String): Unit = {
-    val anno = new ChiselAnnotation with RunFirrtlTransform {
-      def toFirrtl = BlackBoxPathAnno(self.toNamed, blackBoxPath)
-      def transformClass = classOf[BlackBoxSourceHelper]
-    }
-    chisel3.experimental.annotate(anno)
-  }
-}
diff --git a/src/main/scala/chisel3/util/Math.scala b/src/main/scala/chisel3/util/Math.scala
index 6eab9241..1fc45650 100644
--- a/src/main/scala/chisel3/util/Math.scala
+++ b/src/main/scala/chisel3/util/Math.scala
@@ -23,11 +23,10 @@ import chisel3.internal
   * }}}
   */
 object log2Up {
-  // Do not deprecate until zero-width wires fully work:
-  // https://github.com/freechipsproject/chisel3/issues/847
-  //@chiselRuntimeDeprecated
-  //@deprecated("Use log2Ceil instead", "chisel3")
-  def apply(in: BigInt): Int = Chisel.log2Up(in)
+  def apply(in: BigInt): Int = {
+    require(in >= 0)
+    1.max((in - 1).bitLength)
+  }
 }
 
 /** Compute the log2 of a Scala integer, rounded up.
@@ -66,7 +65,7 @@ object log2Down {
   // https://github.com/freechipsproject/chisel3/issues/847
   //@chiselRuntimeDeprecated
   //@deprecated("Use log2Floor instead", "chisel3")
-  def apply(in: BigInt): Int = Chisel.log2Down(in)
+  def apply(in: BigInt): Int = log2Up(in) - (if (isPow2(in)) 0 else 1)
 }
 
 /** Compute the log2 of a Scala integer, rounded down.