Merge branch 'master' into tobits-deprecation

1 files changed, 39 insertions, 0 deletions

diff --git a/src/main/scala/chisel3/testers/BasicTester.scala b/src/main/scala/chisel3/testers/BasicTester.scala
new file mode 100644
index 00000000..bd7d4027
--- /dev/null
+++ b/src/main/scala/chisel3/testers/BasicTester.scala
@@ -0,0 +1,39 @@
+// See LICENSE for license details.
+
+package chisel3.testers
+import chisel3._
+
+import scala.language.experimental.macros
+
+import internal._
+import internal.Builder.pushCommand
+import internal.firrtl._
+import internal.sourceinfo.SourceInfo
+//import chisel3.core.ExplicitCompileOptions.NotStrict
+
+class BasicTester extends Module() {
+  // The testbench has no IOs, rather it should communicate using printf, assert, and stop.
+  val io = IO(new Bundle())
+
+  def popCount(n: Long): Int = n.toBinaryString.count(_=='1')
+
+  /** Ends the test reporting success.
+    *
+    * Does not fire when in reset (defined as the encapsulating Module's
+    * reset). If your definition of reset is not the encapsulating Module's
+    * reset, you will need to gate this externally.
+    */
+  def stop()(implicit sourceInfo: SourceInfo) {
+    // TODO: rewrite this using library-style SourceInfo passing.
+    when (!reset) {
+      pushCommand(Stop(sourceInfo, Node(clock), 0))
+    }
+  }
+
+  /** The finish method provides a hook that subclasses of BasicTester can use to
+    * alter a circuit after their constructor has been called.
+    * For example, a specialized tester subclassing BasicTester could override finish in order to
+    * add flow control logic for a decoupled io port of a device under test
+    */
+  def finish(): Unit = {}
+}