Module Hierarchy Refactor (#469)

1 files changed, 6 insertions, 1 deletions

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 191b636e..a7ccc43b 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -151,7 +151,7 @@ package object chisel3 {    // scalastyle:ignore package.object.name
   type SyncReadMem[T <: Data] = chisel3.core.SyncReadMem[T]
 
   val Module = chisel3.core.Module
-  type Module = chisel3.core.Module
+  type Module = chisel3.core.LegacyModule
 
   val printf = chisel3.core.printf
 
@@ -310,6 +310,11 @@ package object chisel3 {    // scalastyle:ignore package.object.name
     val withClock = chisel3.core.withClock
     val withReset = chisel3.core.withReset
 
+    type BaseModule = chisel3.core.BaseModule
+    type MultiIOModule = chisel3.core.ImplicitModule
+    type RawModule = chisel3.core.UserModule
+    type ExtModule = chisel3.core.ExtModule
+
     // Implicit conversions for BlackBox Parameters
     implicit def fromIntToIntParam(x: Int): IntParam = IntParam(BigInt(x))
     implicit def fromLongToIntParam(x: Long): IntParam = IntParam(BigInt(x))