From e07248b8f6022fafdb84f5d1c0ebe3fc90a5475a Mon Sep 17 00:00:00 2001 From: Richard Lin Date: Thu, 13 Apr 2017 22:59:00 -0700 Subject: Module Hierarchy Refactor (#469) --- src/main/scala/chisel3/package.scala | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src/main/scala/chisel3/package.scala') diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala index 191b636e..a7ccc43b 100644 --- a/src/main/scala/chisel3/package.scala +++ b/src/main/scala/chisel3/package.scala @@ -151,7 +151,7 @@ package object chisel3 { // scalastyle:ignore package.object.name type SyncReadMem[T <: Data] = chisel3.core.SyncReadMem[T] val Module = chisel3.core.Module - type Module = chisel3.core.Module + type Module = chisel3.core.LegacyModule val printf = chisel3.core.printf @@ -310,6 +310,11 @@ package object chisel3 { // scalastyle:ignore package.object.name val withClock = chisel3.core.withClock val withReset = chisel3.core.withReset + type BaseModule = chisel3.core.BaseModule + type MultiIOModule = chisel3.core.ImplicitModule + type RawModule = chisel3.core.UserModule + type ExtModule = chisel3.core.ExtModule + // Implicit conversions for BlackBox Parameters implicit def fromIntToIntParam(x: Int): IntParam = IntParam(BigInt(x)) implicit def fromLongToIntParam(x: Long): IntParam = IntParam(BigInt(x)) -- cgit v1.2.3