diff options
| author | Andrew Waterman | 2016-05-02 20:11:58 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2016-05-04 01:48:35 -0700 |
| commit | cd951e193ed6a52c5146583a826e3cae5374d07b (patch) | |
| tree | 754e152d44d44e0bdd24ddede4a554d0d11eb32d /src/main/scala/Chisel/util | |
| parent | bb912f52606d6c11c00dd035af1a4e0033dd091c (diff) | |
Remove dependences from Chisel core on Chisel utils
Partially resolves #164
Diffstat (limited to 'src/main/scala/Chisel/util')
| -rw-r--r-- | src/main/scala/Chisel/util/Bitwise.scala | 10 | ||||
| -rw-r--r-- | src/main/scala/Chisel/util/Cat.scala | 10 | ||||
| -rw-r--r-- | src/main/scala/Chisel/util/Mux.scala | 18 |
3 files changed, 4 insertions, 34 deletions
diff --git a/src/main/scala/Chisel/util/Bitwise.scala b/src/main/scala/Chisel/util/Bitwise.scala index 7188ec32..239a295e 100644 --- a/src/main/scala/Chisel/util/Bitwise.scala +++ b/src/main/scala/Chisel/util/Bitwise.scala @@ -15,15 +15,7 @@ object FillInterleaved */ object PopCount { - def apply(in: Iterable[Bool]): UInt = { - if (in.size == 0) { - UInt(0) - } else if (in.size == 1) { - in.head - } else { - apply(in.slice(0, in.size/2)) + Cat(UInt(0), apply(in.slice(in.size/2, in.size))) - } - } + def apply(in: Iterable[Bool]): UInt = SeqUtils.count(in.toSeq) def apply(in: Bits): UInt = apply((0 until in.getWidth).map(in(_))) } diff --git a/src/main/scala/Chisel/util/Cat.scala b/src/main/scala/Chisel/util/Cat.scala index 088a208e..dd706e62 100644 --- a/src/main/scala/Chisel/util/Cat.scala +++ b/src/main/scala/Chisel/util/Cat.scala @@ -14,13 +14,5 @@ object Cat { * @param r any number of other Data elements to be combined in order * @return A UInt which is all of the bits combined together */ - def apply[T <: Bits](r: Seq[T]): UInt = { - if (r.tail.isEmpty) { - r.head.asUInt - } else { - val left = apply(r.slice(0, r.length/2)) - val right = apply(r.slice(r.length/2, r.length)) - left ## right - } - } + def apply[T <: Bits](r: Seq[T]): UInt = SeqUtils.asUInt(r.reverse) } diff --git a/src/main/scala/Chisel/util/Mux.scala b/src/main/scala/Chisel/util/Mux.scala index c2833103..a7d835f6 100644 --- a/src/main/scala/Chisel/util/Mux.scala +++ b/src/main/scala/Chisel/util/Mux.scala @@ -12,15 +12,7 @@ object Mux1H { def apply[T <: Data](sel: Seq[Bool], in: Seq[T]): T = apply(sel zip in) - def apply[T <: Data](in: Iterable[(Bool, T)]): T = { - if (in.tail.isEmpty) { - in.head._2 - } else { - val masked = in map {case (s, i) => Mux(s, i.toBits, Bits(0))} - val width = in.map(_._2.width).reduce(_ max _) - in.head._2.cloneTypeWidth(width).fromBits(masked.reduceLeft(_|_)) - } - } + def apply[T <: Data](in: Iterable[(Bool, T)]): T = SeqUtils.oneHotMux(in) def apply[T <: Data](sel: UInt, in: Seq[T]): T = apply((0 until in.size).map(sel(_)), in) def apply(sel: UInt, in: UInt): Bool = (sel & in).orR @@ -33,13 +25,7 @@ object Mux1H */ object PriorityMux { - def apply[T <: Bits](in: Seq[(Bool, T)]): T = { - if (in.size == 1) { - in.head._2 - } else { - Mux(in.head._1, in.head._2, apply(in.tail)) - } - } + def apply[T <: Bits](in: Seq[(Bool, T)]): T = SeqUtils.priorityMux(in) def apply[T <: Bits](sel: Seq[Bool], in: Seq[T]): T = apply(sel zip in) def apply[T <: Bits](sel: Bits, in: Seq[T]): T = apply((0 until in.size).map(sel(_)), in) } |
