Get core to compile

4 files changed, 14 insertions, 13 deletions

diff --git a/core/src/main/scala/chisel3/experimental/Analog.scala b/core/src/main/scala/chisel3/experimental/Analog.scala
index c932228f..fec02e50 100644
--- a/core/src/main/scala/chisel3/experimental/Analog.scala
+++ b/core/src/main/scala/chisel3/experimental/Analog.scala
@@ -73,7 +73,7 @@ final class Analog private (private[chisel3] val width: Width) extends Element {
     binding = target
   }
 
-  override def do_asUInt: UInt =
+  override def asUInt: UInt =
     throwException("Analog does not support asUInt")
 
   private[chisel3] override def connectFromBits(
diff --git a/core/src/main/scala/chisel3/experimental/ChiselEnum.scala b/core/src/main/scala/chisel3/experimental/ChiselEnum.scala
index d8c3fe0b..9d69fe37 100644
--- a/core/src/main/scala/chisel3/experimental/ChiselEnum.scala
+++ b/core/src/main/scala/chisel3/experimental/ChiselEnum.scala
@@ -141,9 +141,9 @@ abstract class EnumType(private[chisel3] val factory: ChiselEnum, selfAnnotating
     * @param s a [[scala.collection.Seq$ Seq]] of enumeration values to look for
     * @return a hardware [[Bool]] that indicates if this value matches any of the given values
     */
-  final def isOneOf(s: Seq[EnumType]): Bool = {
-    VecInit(s.map(this === _)).asUInt().orR()
-  }
+  // final def isOneOf(s: Seq[EnumType]): Bool = {
+  //   Vec(s.map(this === _)).asUInt().orR()
+  // }
 
   /** Test if this enumeration is equal to any of the values given as arguments
     *
@@ -151,10 +151,10 @@ abstract class EnumType(private[chisel3] val factory: ChiselEnum, selfAnnotating
     * @param u2 zero or more additional values to look for
     * @return a hardware [[Bool]] that indicates if this value matches any of the given values
     */
-  final def isOneOf(
-    u1: EnumType,
-    u2: EnumType*
-  ): Bool = isOneOf(u1 +: u2.toSeq)
+  // final def isOneOf(
+  //   u1: EnumType,
+  //   u2: EnumType*
+  // ): Bool = isOneOf(u1 +: u2.toSeq)
 
   def next: this.type = {
     if (litOption.isDefined) {
@@ -204,7 +204,7 @@ abstract class EnumType(private[chisel3] val factory: ChiselEnum, selfAnnotating
       }.flatten.toSeq
   }
 
-  private def outerMostVec(d: Data = this): Option[Vec[_]] = {
+  private def outerMostVec(d: Data = this): Option[Vec[?]] = {
     val currentVecOpt = d match {
       case v: Vec[_] => Some(v)
       case _ => None
@@ -253,7 +253,7 @@ abstract class EnumType(private[chisel3] val factory: ChiselEnum, selfAnnotating
     for ((name, value) <- allNamesPadded) {
       when(this === value) {
         for ((r, c) <- result.zip(name)) {
-          r := c.toChar.U
+          r := c.toInt.U
         }
       }
     }
diff --git a/core/src/main/scala/chisel3/experimental/Trace.scala b/core/src/main/scala/chisel3/experimental/Trace.scala
index eb2ed46a..b3ac37f9 100644
--- a/core/src/main/scala/chisel3/experimental/Trace.scala
+++ b/core/src/main/scala/chisel3/experimental/Trace.scala
@@ -5,6 +5,7 @@ import chisel3.{Aggregate, Data, Element, Module, RawModule}
 import firrtl.AnnotationSeq
 import firrtl.annotations.{Annotation, CompleteTarget, SingleTargetAnnotation}
 import firrtl.transforms.DontTouchAllTargets
+import firrtl.annoSeqToSeq
 
 /** The util that records the reference map from original [[Data]]/[[Module]] annotated in Chisel and final FIRRTL.
   * @example
diff --git a/core/src/main/scala/chisel3/experimental/package.scala b/core/src/main/scala/chisel3/experimental/package.scala
index 4862e209..80c3e28a 100644
--- a/core/src/main/scala/chisel3/experimental/package.scala
+++ b/core/src/main/scala/chisel3/experimental/package.scala
@@ -123,7 +123,7 @@ package object experimental {
   object BundleLiterals {
     implicit class AddBundleLiteralConstructor[T <: Record](x: T) {
       def Lit(elems: (T => (Data, Data))*): T = {
-        x._makeLit(elems: _*)
+        x._makeLit(elems*)
       }
     }
   }
@@ -140,7 +140,7 @@ package object experimental {
         * @return
         */
       def Lit(elems: (Int, T)*): Vec[T] = {
-        x._makeLit(elems: _*)
+        x._makeLit(elems*)
       }
     }
 
@@ -154,7 +154,7 @@ package object experimental {
         val indexElements: Seq[(Int, T)] = elems.zipWithIndex.map { case (element, index) => (index, element) }
         val widestElement: T = elems.maxBy(_.getWidth)
         val vec: Vec[T] = Vec.apply(indexElements.length, chiselTypeOf(widestElement))
-        vec.Lit(indexElements: _*)
+        vec.Lit(indexElements*)
       }
     }
   }