summaryrefslogtreecommitdiff
path: root/core/src/main/scala/chisel3/Element.scala
diff options
context:
space:
mode:
authorJack Koenig2021-02-10 13:49:25 -0800
committerGitHub2021-02-10 13:49:25 -0800
commitf41e762830c5af1a92de9d8ee26e2b0de52b76ad (patch)
tree89a42cf3ae9eb96b02a54bc83040c04cd1ea294d /core/src/main/scala/chisel3/Element.scala
parent2ed343e2305b7c22000f3f46fa81d73a369907eb (diff)
parent0a0d7c6aac4326f2127d6d95efa5a4e10c81946c (diff)
Merge pull request #1624 from chipsalliance/gc-data
Make Data GC-able
Diffstat (limited to 'core/src/main/scala/chisel3/Element.scala')
-rw-r--r--core/src/main/scala/chisel3/Element.scala3
1 files changed, 2 insertions, 1 deletions
diff --git a/core/src/main/scala/chisel3/Element.scala b/core/src/main/scala/chisel3/Element.scala
index 55415f3d..0c99ff70 100644
--- a/core/src/main/scala/chisel3/Element.scala
+++ b/core/src/main/scala/chisel3/Element.scala
@@ -17,7 +17,8 @@ abstract class Element extends Data {
def widthKnown: Boolean = width.known
def name: String = getRef.name
- private[chisel3] override def bind(target: Binding, parentDirection: SpecifiedDirection) {
+ private[chisel3] override def bind(target: Binding, parentDirection: SpecifiedDirection): Unit = {
+ _parent.foreach(_.addId(this))
binding = target
val resolvedDirection = SpecifiedDirection.fromParent(parentDirection, specifiedDirection)
direction = ActualDirection.fromSpecified(resolvedDirection)