Compile ok.

Need to convert UInt(x) into UInt.Lit(x) or UInt.width(x)

3 files changed, 31 insertions, 8 deletions

diff --git a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
index 1b49e163..666d8283 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
@@ -179,8 +179,11 @@ sealed class Vec[T <: Data] private (gen: => T, val length: Int)
   @deprecated("Use Vec.apply instead", "chisel3")
   def write(idx: UInt, data: T): Unit = apply(idx).:=(data)(DeprecatedSourceInfo)
 
-  override def cloneType: this.type =
-    Vec(length, gen).asInstanceOf[this.type]
+  override def cloneType: this.type = {
+    val clone = Vec(length, gen).asInstanceOf[this.type]
+    clone.unBind()
+    clone
+  }
 
   private[chisel3] def toType: String = s"${sample_element.toType}[$length]"
   private[chisel3] lazy val flatten: IndexedSeq[Bits] =
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
index 1bdf66f1..e8aae578 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Bits.scala
@@ -51,7 +51,11 @@ sealed abstract class Bits(width: Width, override val litArg: Option[LitArg])
 
   private[chisel3] def flatten: IndexedSeq[Bits] = IndexedSeq(this)
 
-  def cloneType: this.type = cloneTypeWidth(width)
+  def cloneType: this.type = {
+    val clone = cloneTypeWidth(width)
+    clone.unBind()
+    clone
+  }
 
   final def tail(n: Int): UInt = macro SourceInfoTransform.nArg
   final def head(n: Int): UInt = macro SourceInfoTransform.nArg
@@ -514,12 +518,12 @@ sealed class UInt private[core] (width: Width, lit: Option[ULit] = None)
 private[core] sealed trait UIntFactory {
   /** Create a UInt type with inferred width. */
   def apply(): UInt = apply(Width())
+  /** Create a UInt type or port with fixed width. */
+  def apply(width: Int): UInt = apply(Width(width))
   /** Create a UInt port with specified width. */
   def apply(width: Width): UInt = new UInt(width)
   /** Create a UInt with a specified width - compatibility with Chisel2. */
-  def apply(dummy: Option[Direction] = None, width: Int): UInt = apply(Width(width))
-  /** Create a UInt literal with inferred width. */
-  def apply(value: BigInt): UInt = apply(value, Width())
+  def apply(dummy: Direction, width: Int): UInt = apply(Width(width))
   /** Create a UInt literal with fixed width. */
   def apply(value: BigInt, width: Int): UInt = apply(value, Width(width))
   /** Create a UInt literal with inferred width. */
@@ -733,7 +737,12 @@ object Bool {
 
   /** Creates Bool literal.
    */
-  def apply(x: Boolean): Bool = new Bool(Some(ULit(if (x) 1 else 0, Width(1))))
+  def apply(x: Boolean): Bool = {
+    val result = new Bool(Some(ULit(if (x) 1 else 0, Width(1))))
+    // Bind result to being an Literal
+    result.binding = LitBinding()
+    result
+  }
 }
 
 object Mux {
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Data.scala b/chiselFrontend/src/main/scala/chisel3/core/Data.scala
index 4cc66cb5..79119114 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Data.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Data.scala
@@ -174,6 +174,13 @@ abstract class Data extends HasId {
     */
   @deprecated("Use asBits, which makes the reinterpret cast more explicit and actually returns Bits", "chisel3")
   def toBits(): UInt = SeqUtils.do_asUInt(this.flatten)(DeprecatedSourceInfo)
+
+  protected def unBind(): Unit = {
+    //TODO(twigg): Do recursively for better error messages
+    for(elem <- this.allElements) {
+      elem.binding = UnboundBinding(elem.binding.direction)
+    }
+  }
 }
 
 object Wire {
@@ -210,7 +217,11 @@ object Clock {
 
 // TODO: Document this.
 sealed class Clock extends Element(Width(1)) {
-  def cloneType: this.type = Clock().asInstanceOf[this.type]
+  def cloneType: this.type = {
+    val clone = Clock().asInstanceOf[this.type]
+    clone.unBind()
+    clone
+  }
   private[chisel3] override def flatten: IndexedSeq[Bits] = IndexedSeq()
   private[chisel3] def cloneTypeWidth(width: Width): this.type = cloneType
   private[chisel3] def toType = "Clock"