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authorjackkoenig2016-09-22 22:38:33 -0700
committerjackkoenig2016-11-18 11:05:33 -0800
commit822160cc8e76e70643fb56707bb39f6f7526b6fd (patch)
tree50b9e132c6e7d2d5113195683ef3cc3fc5fc1113 /chiselFrontend/src/main/scala/chisel3/core/Module.scala
parent6929ca0fc64b562f4852a49df617a1836e083563 (diff)
Add support for parameterized BlackBoxes
Also restrict black boxes to not allow hardware inside of them since it was being silently dropped anyway. Resolves #289
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/Module.scala')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Module.scala10
1 files changed, 9 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
index ca391091..62b6d5ce 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
@@ -41,8 +41,16 @@ object Module {
sourceInfo.makeMessage(" See " + _))
}
Builder.currentModule = parent // Back to parent!
+
val ports = m.computePorts
- val component = Component(m, m.name, ports, m._commands)
+ // Blackbox inherits from Module so we have to match on it first TODO fix
+ val component = m match {
+ case bb: BlackBox =>
+ DefBlackBox(bb, bb.name, ports, bb.params)
+ case mod: Module =>
+ mod._commands.prepend(DefInvalid(childSourceInfo, mod.io.ref)) // init module outputs
+ DefModule(mod, mod.name, ports, mod._commands)
+ }
m._component = Some(component)
Builder.components += component
// Avoid referencing 'parent' in top module