diff options
| author | ducky | 2018-05-09 17:07:13 -0700 |
|---|---|---|
| committer | Richard Lin | 2018-07-04 18:39:28 -0500 |
| commit | 7834f0ada9f8bcfc28c1d6124f63acdcaa2d4755 (patch) | |
| tree | f086a643a249a04e4929bf12c9d508cf3fea2087 /chiselFrontend/src/main/scala/chisel3/core/Clock.scala | |
| parent | b74034446223db6731c7e4f2eb362b3349efc8be (diff) | |
work on new style literal accessors
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/Clock.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Clock.scala | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Clock.scala b/chiselFrontend/src/main/scala/chisel3/core/Clock.scala index f682310b..55f76160 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Clock.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Clock.scala @@ -23,6 +23,8 @@ sealed class Clock extends Element(Width(1)) { case _ => super.badConnect(that)(sourceInfo) } + override def litToBigIntOption = None + /** Not really supported */ def toPrintable: Printable = PString("CLOCK") |