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authorJim Lawson2017-04-25 08:44:35 -0700
committerGitHub2017-04-25 08:44:35 -0700
commit4a6396ca5ff9dfba9019552012bce459ef3c3b1e (patch)
tree940018ca04febec6f3e18b1f03700fa3f203708e /chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala
parentd439ac0144826bb170c43ae71df9782cdd0d5749 (diff)
Remove explicit import of NotStrict - fixes #492 (#494)
* Remove explicit import of NotStrict - fixes #492 * Provide macro for MemBase.apply(). * Provide macro for MemBase.apply(). Since a macro cannot override an abstract method, provide a concrete apply method n VecLike() that we can override with a macro. * Remove concrete apply() in VecLike. Since MemBase no longer extends the trait VecLike, we do not require a concrete method to which we can apply a macro to extract the appropriate CompileOptions.
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala1
1 files changed, 1 insertions, 0 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala b/chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala
index 95ad95ef..4240a945 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/BiConnect.scala
@@ -73,6 +73,7 @@ object BiConnect {
if(left_v.length != right_v.length) { throw MismatchedVecException }
for(idx <- 0 until left_v.length) {
try {
+ implicit val compileOptions = connectCompileOptions
connect(sourceInfo, connectCompileOptions, left_v(idx), right_v(idx), context_mod)
} catch {
case BiConnectException(message) => throw BiConnectException(s"($idx)$message")