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authorRichard Lin2016-11-21 13:44:26 -0800
committerGitHub2016-11-21 13:44:26 -0800
commit3b4755716a74d4711efa3ce6799742479e17e80b (patch)
tree56652eaa478d5dfd8cddfbe2795c0123d39d230d /chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
parentcd6eb41275381a4399a8a88c886110d276bb805c (diff)
parent81e5d00d18a5ba9ae33c10219a270148002fc672 (diff)
Merge pull request #372 from ucb-bar/onetrueliteral
Standardize the One True Way of specifying literals
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala14
1 files changed, 7 insertions, 7 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
index de7af462..8fdcb260 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
@@ -123,10 +123,10 @@ object Vec {
/** Truncate an index to implement modulo-power-of-2 addressing. */
private[core] def truncateIndex(idx: UInt, n: Int)(implicit sourceInfo: SourceInfo): UInt = {
val w = BigInt(n-1).bitLength
- if (n <= 1) UInt(0)
+ if (n <= 1) 0.U
else if (idx.width.known && idx.width.get <= w) idx
else if (idx.width.known) idx(w-1,0)
- else (idx | UInt(0, w))(w-1,0)
+ else (idx | 0.U(w))(w-1,0)
}
}
@@ -249,7 +249,7 @@ trait VecLike[T <: Data] extends collection.IndexedSeq[T] with HasId {
// IndexedSeq has its own hashCode/equals that we must not use
override def hashCode: Int = super[HasId].hashCode
override def equals(that: Any): Boolean = super[HasId].equals(that)
-
+
@deprecated("Use Vec.apply instead", "chisel3")
def read(idx: UInt): T
@@ -261,14 +261,14 @@ trait VecLike[T <: Data] extends collection.IndexedSeq[T] with HasId {
def forall(p: T => Bool): Bool = macro SourceInfoTransform.pArg
def do_forall(p: T => Bool)(implicit sourceInfo: SourceInfo): Bool =
- (this map p).fold(Bool(true))(_ && _)
+ (this map p).fold(true.B)(_ && _)
/** Outputs true if p outputs true for at least one element.
*/
def exists(p: T => Bool): Bool = macro SourceInfoTransform.pArg
def do_exists(p: T => Bool)(implicit sourceInfo: SourceInfo): Bool =
- (this map p).fold(Bool(false))(_ || _)
+ (this map p).fold(false.B)(_ || _)
/** Outputs true if the vector contains at least one element equal to x (using
* the === operator).
@@ -288,7 +288,7 @@ trait VecLike[T <: Data] extends collection.IndexedSeq[T] with HasId {
/** Helper function that appends an index (literal value) to each element,
* useful for hardware generators which output an index.
*/
- private def indexWhereHelper(p: T => Bool) = this map p zip (0 until length).map(i => UInt(i))
+ private def indexWhereHelper(p: T => Bool) = this map p zip (0 until length).map(i => i.asUInt)
/** Outputs the index of the first element for which p outputs true.
*/
@@ -388,7 +388,7 @@ class Bundle extends Aggregate {
private[chisel3] lazy val flatten = namedElts.flatMap(_._2.flatten)
private[chisel3] override def _onModuleClose: Unit = // scalastyle:ignore method.name
for ((name, elt) <- namedElts) { elt.setRef(this, _namespace.name(name)) }
-
+
private[chisel3] final def allElements: Seq[Element] = namedElts.flatMap(_._2.allElements)
override def cloneType : this.type = {