Changed deprecation warning for Data#toBits to recommend asUInt instead because the sole remaining use of toBits in chiselTests was to compare to Vectors declared differently but with same underlying bits.

Making at toBits was problematic because it did not support === method.
Changed Vec and Bundle to both support toUInt()
Note: If toBits is actually needed now, one can use toInt().toBits()

4 files changed, 45 insertions, 4 deletions

diff --git a/chiselFrontend/src/main/scala/Chisel/Aggregate.scala b/chiselFrontend/src/main/scala/Chisel/Aggregate.scala
index 1eef5d69..8af4e9e9 100644
--- a/chiselFrontend/src/main/scala/Chisel/Aggregate.scala
+++ b/chiselFrontend/src/main/scala/Chisel/Aggregate.scala
@@ -167,6 +167,11 @@ sealed class Vec[T <: Data] private (gen: => T, val length: Int)
   private[Chisel] lazy val flatten: IndexedSeq[Bits] =
     (0 until length).flatMap(i => this.apply(i).flatten)
 
+  /** Reinterpret cast to UInt. */
+  def asUInt(): UInt = macro SourceInfoTransform.noArg
+
+  def do_asUInt(implicit sourceInfo: SourceInfo): UInt = SeqUtils.do_asUInt(this.flatten).asUInt()
+
   for ((elt, i) <- self zipWithIndex)
     elt.setRef(this, i)
 }
@@ -341,6 +346,12 @@ class Bundle extends Aggregate(NO_DIR) {
   private[Chisel] lazy val flatten = namedElts.flatMap(_._2.flatten)
   private[Chisel] def addElt(name: String, elt: Data): Unit =
     namedElts += name -> elt
+
+  /** Reinterpret cast to UInt. */
+  def asUInt(): UInt = macro SourceInfoTransform.noArg
+
+  def do_asUInt(implicit sourceInfo: SourceInfo): UInt = SeqUtils.do_asUInt(this.flatten).asUInt()
+
   private[Chisel] override def _onModuleClose: Unit = // scalastyle:ignore method.name
     for ((name, elt) <- namedElts) { elt.setRef(this, _namespace.name(name)) }
 
diff --git a/chiselFrontend/src/main/scala/Chisel/Data.scala b/chiselFrontend/src/main/scala/Chisel/Data.scala
index d16843f7..adb4ff7b 100644
--- a/chiselFrontend/src/main/scala/Chisel/Data.scala
+++ b/chiselFrontend/src/main/scala/Chisel/Data.scala
@@ -117,8 +117,10 @@ abstract class Data(dirArg: Direction) extends HasId {
     *
     * This performs the inverse operation of fromBits(Bits).
     */
-  @deprecated("Use asBits, which makes the reinterpret cast more explicit and actually returns Bits", "chisel3")
+  @deprecated("Best alternative, .toUInt() or if Bits really needed, .toUInt().toBits()", "chisel3")
   def toBits(): UInt = SeqUtils.do_asUInt(this.flatten)(DeprecatedSourceInfo)
+
+//  def asBits(): Bits
 }
 
 object Wire {
diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala
index d2e42fa9..658f5bb9 100644
--- a/src/test/scala/chiselTests/BundleWire.scala
+++ b/src/test/scala/chiselTests/BundleWire.scala
@@ -23,6 +23,27 @@ class BundleWire(n: Int) extends Module {
   }
 }
 
+class BundleToUnitTester extends BasicTester {
+  val bundle1 = Wire(new Bundle {
+    val a = UInt(width = 4)
+    val b = UInt(width = 4)
+  })
+  val bundle2 = Wire(new Bundle {
+    val a = UInt(width = 2)
+    val b = UInt(width = 6)
+  })
+
+  // 0b00011011 split as 0001 1011 and as 00 011011
+  bundle1.a := 1.U
+  bundle1.b := 11.U
+  bundle2.a := 0.U
+  bundle2.b := 27.U
+
+  assert(bundle1.asUInt() === bundle2.asUInt())
+
+  stop()
+}
+
 class BundleWireTester(n: Int, x: Int, y: Int) extends BasicTester {
   val dut = Module(new BundleWire(n))
   dut.io.in.x := UInt(x)
@@ -42,3 +63,10 @@ class BundleWireSpec extends ChiselPropSpec {
     }
   }
 }
+
+class BundleToUIntSpec extends ChiselPropSpec {
+  property("Bundles with same data but different, underlying elements should compare as UInt") {
+    assertTesterPasses( new BundleToUnitTester )
+  }
+}
+
diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala
index 943d9e4b..9ff8ed46 100644
--- a/src/test/scala/chiselTests/Vec.scala
+++ b/src/test/scala/chiselTests/Vec.scala
@@ -20,9 +20,9 @@ class TabulateTester(n: Int) extends BasicTester {
   val x = Vec(Array.tabulate(n){ i => UInt(i * 2) })
   val u = Vec.tabulate(n)(i => UInt(i*2))
 
-  assert(v.toBits === x.toBits)
-  assert(v.toBits === u.toBits)
-  assert(x.toBits === u.toBits)
+  assert(v.asUInt() === x.asUInt())
+  assert(v.asUInt() === u.asUInt())
+  assert(x.asUInt() === u.asUInt())
 
   stop()
 }