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xv6-riscv
riscv
MIT xv6-RISCV kernel modified to RV64I base integer extension
Aditya N. Naik
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kernel
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trap.c
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2020-08-10
interrupt-driven uart output, hopefully a nice example for teaching.
Robert Morris
2020-08-10
rename p->tf to p->trapframe, for consistency with p->context
Robert Morris
2019-10-27
nits
Robert Morris
2019-09-17
all of PTE_FLAGS
Robert Morris
2019-09-10
Support exit status for exit/wait
Frans Kaashoek
2019-07-27
console/uart tweaks
Robert Morris
2019-07-26
???
Robert Morris
2019-07-26
machinevec -> timervec
Robert Morris
2019-07-26
uservec before userret in trampoline, to match book and kernelvec
Robert Morris
2019-07-26
trampin -> uservec
Robert Morris
2019-07-24
display assembly instructions, to help with first.tex exercise
Robert Morris
2019-07-23
simplify kernel mapping calls
Robert Morris
2019-07-23
one more TRAMPOLINE
Frans Kaashoek
2019-07-11
cosmetic changes
Robert Morris
2019-07-10
have kill() lock before looking at p->pid
Robert Morris
2019-07-10
tweak some comments.
Robert Morris
2019-07-02
Merge branch 'riscv' into riscv-proc
Frans Kaashoek
2019-07-02
Checkpoint switching to per-process locks, in attempt clarify xv6's
Frans Kaashoek
2019-07-02
don't enable interrupts until done with sstatus, scause, &c
Robert Morris
2019-07-01
timer interrupt in the kernel -> yield
Robert Morris
2019-06-13
clean up virtio code
Robert Morris
2019-06-13
virtio disk driver
Robert Morris
2019-06-11
separate source into kernel/ user/ mkfs/
Robert Morris