Ports merge

6 files changed, 1 insertions, 1696 deletions

diff --git a/src/main.h b/src/main.h
index 5d4be41..6579484 100644
--- a/src/main.h
+++ b/src/main.h
@@ -28,7 +28,7 @@ extern "C" {
 #endif

 

 /* Includes ------------------------------------------------------------------*/

-#include "stm32f4xx_hal.h"

+#include "port.h"

 

 /* Private includes ----------------------------------------------------------*/

 /* USER CODE BEGIN Includes */

diff --git a/src/stm32f4xx_hal_conf.h b/src/stm32f4xx_hal_conf.h
deleted file mode 100644
index e7e342a..0000000
--- a/src/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,443 +0,0 @@
-/**

-  ******************************************************************************

-  * @file    stm32f4xx_hal_conf_template.h

-  * @author  MCD Application Team

-  * @brief   HAL configuration template file. 

-  *          This file should be copied to the application folder and renamed

-  *          to stm32f4xx_hal_conf.h.

-  ******************************************************************************

-  * @attention

-  *

-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.

-  * All rights reserved.</center></h2>

-  *

-  * This software component is licensed by ST under BSD 3-Clause license,

-  * the "License"; You may not use this file except in compliance with the

-  * License. You may obtain a copy of the License at:

-  *                        opensource.org/licenses/BSD-3-Clause

-  *

-  ******************************************************************************

-  */ 

-

-/* Define to prevent recursive inclusion -------------------------------------*/

-#ifndef __STM32F4xx_HAL_CONF_H

-#define __STM32F4xx_HAL_CONF_H

-

-#ifdef __cplusplus

- extern "C" {

-#endif

-

-/* Exported types ------------------------------------------------------------*/

-/* Exported constants --------------------------------------------------------*/

-

-/* ########################## Module Selection ############################## */

-/**

-  * @brief This is the list of modules to be used in the HAL driver 

-  */

-#define HAL_MODULE_ENABLED  

-

-  /* #define HAL_ADC_MODULE_ENABLED   */

-/* #define HAL_CRYP_MODULE_ENABLED   */

-/* #define HAL_CAN_MODULE_ENABLED   */

-/* #define HAL_CRC_MODULE_ENABLED   */

-/* #define HAL_CRYP_MODULE_ENABLED   */

-/* #define HAL_DAC_MODULE_ENABLED   */

-/* #define HAL_DCMI_MODULE_ENABLED   */

-/* #define HAL_DMA2D_MODULE_ENABLED   */

-/* #define HAL_ETH_MODULE_ENABLED   */

-/* #define HAL_NAND_MODULE_ENABLED   */

-/* #define HAL_NOR_MODULE_ENABLED   */

-/* #define HAL_PCCARD_MODULE_ENABLED   */

-/* #define HAL_SRAM_MODULE_ENABLED   */

-/* #define HAL_SDRAM_MODULE_ENABLED   */

-/* #define HAL_HASH_MODULE_ENABLED   */

-#define HAL_I2C_MODULE_ENABLED

-/* #define HAL_I2S_MODULE_ENABLED   */

-/* #define HAL_IWDG_MODULE_ENABLED   */

-/* #define HAL_LTDC_MODULE_ENABLED   */

-/* #define HAL_RNG_MODULE_ENABLED   */

-/* #define HAL_RTC_MODULE_ENABLED   */

-/* #define HAL_SAI_MODULE_ENABLED   */

-/* #define HAL_SD_MODULE_ENABLED   */

-/* #define HAL_MMC_MODULE_ENABLED   */

-/* #define HAL_SPI_MODULE_ENABLED   */

-/* #define HAL_TIM_MODULE_ENABLED   */

-#define HAL_UART_MODULE_ENABLED

-/* #define HAL_USART_MODULE_ENABLED   */

-/* #define HAL_IRDA_MODULE_ENABLED   */

-/* #define HAL_SMARTCARD_MODULE_ENABLED   */

-/* #define HAL_SMBUS_MODULE_ENABLED   */

-/* #define HAL_WWDG_MODULE_ENABLED   */

-/* #define HAL_PCD_MODULE_ENABLED   */

-/* #define HAL_HCD_MODULE_ENABLED   */

-/* #define HAL_DSI_MODULE_ENABLED   */

-/* #define HAL_QSPI_MODULE_ENABLED   */

-/* #define HAL_QSPI_MODULE_ENABLED   */

-/* #define HAL_CEC_MODULE_ENABLED   */

-/* #define HAL_FMPI2C_MODULE_ENABLED   */

-/* #define HAL_SPDIFRX_MODULE_ENABLED   */

-/* #define HAL_DFSDM_MODULE_ENABLED   */

-/* #define HAL_LPTIM_MODULE_ENABLED   */

-#define HAL_GPIO_MODULE_ENABLED

-#define HAL_EXTI_MODULE_ENABLED

-#define HAL_DMA_MODULE_ENABLED

-#define HAL_RCC_MODULE_ENABLED

-#define HAL_FLASH_MODULE_ENABLED

-#define HAL_PWR_MODULE_ENABLED

-#define HAL_CORTEX_MODULE_ENABLED

-

-/* ########################## HSE/HSI Values adaptation ##################### */

-/**

-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.

-  *        This value is used by the RCC HAL module to compute the system frequency

-  *        (when HSE is used as system clock source, directly or through the PLL).  

-  */

-#if !defined  (HSE_VALUE) 

-  #define HSE_VALUE    ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */

-#endif /* HSE_VALUE */

-

-#if !defined  (HSE_STARTUP_TIMEOUT)

-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */

-#endif /* HSE_STARTUP_TIMEOUT */

-

-/**

-  * @brief Internal High Speed oscillator (HSI) value.

-  *        This value is used by the RCC HAL module to compute the system frequency

-  *        (when HSI is used as system clock source, directly or through the PLL). 

-  */

-#if !defined  (HSI_VALUE)

-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/

-#endif /* HSI_VALUE */

-

-/**

-  * @brief Internal Low Speed oscillator (LSI) value.

-  */

-#if !defined  (LSI_VALUE) 

- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/

-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz

-                                             The real value may vary depending on the variations

-                                             in voltage and temperature.*/

-/**

-  * @brief External Low Speed oscillator (LSE) value.

-  */

-#if !defined  (LSE_VALUE)

- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */

-#endif /* LSE_VALUE */

-

-#if !defined  (LSE_STARTUP_TIMEOUT)

-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */

-#endif /* LSE_STARTUP_TIMEOUT */

-

-/**

-  * @brief External clock source for I2S peripheral

-  *        This value is used by the I2S HAL module to compute the I2S clock source 

-  *        frequency, this source is inserted directly through I2S_CKIN pad. 

-  */

-#if !defined  (EXTERNAL_CLOCK_VALUE)

-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/

-#endif /* EXTERNAL_CLOCK_VALUE */

-

-/* Tip: To avoid modifying this file each time you need to use different HSE,

-   ===  you can define the HSE value in your toolchain compiler preprocessor. */

-

-/* ########################### System Configuration ######################### */

-/**

-  * @brief This is the HAL system configuration section

-  */

-#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */           

-#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */            

-#define  USE_RTOS                     0U     

-#define  PREFETCH_ENABLE              1U

-#define  INSTRUCTION_CACHE_ENABLE     1U

-#define  DATA_CACHE_ENABLE            1U

-

-/* ########################## Assert Selection ############################## */

-/**

-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 

-  *        HAL drivers code

-  */

-/* #define USE_FULL_ASSERT    1U */

-

-/* ################## Ethernet peripheral configuration ##################### */

-

-/* Section 1 : Ethernet peripheral configuration */

-

-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */

-#define MAC_ADDR0   2U

-#define MAC_ADDR1   0U

-#define MAC_ADDR2   0U

-#define MAC_ADDR3   0U

-#define MAC_ADDR4   0U

-#define MAC_ADDR5   0U

-

-/* Definition of the Ethernet driver buffers size and count */   

-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */

-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */

-#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */

-#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */

-

-/* Section 2: PHY configuration section */

-

-/* DP83848_PHY_ADDRESS Address*/ 

-#define DP83848_PHY_ADDRESS           0x01U

-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 

-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)

-/* PHY Configuration delay */

-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)

-

-#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)

-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)

-

-/* Section 3: Common PHY Registers */

-

-#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */

-#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */

- 

-#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */

-#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */

-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */

-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */

-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */

-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */

-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */

-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */

-#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */

-#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */

-

-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */

-#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */

-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */

-  

-/* Section 4: Extended PHY Registers */

-#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */

-

-#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */

-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */

-

-/* ################## SPI peripheral configuration ########################## */

-

-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver

-* Activated: CRC code is present inside driver

-* Deactivated: CRC code cleaned from driver

-*/

-

-#define USE_SPI_CRC                     0U

-

-/* Includes ------------------------------------------------------------------*/

-/**

-  * @brief Include module's header file 

-  */

-

-#ifdef HAL_RCC_MODULE_ENABLED

-  #include "stm32f4xx_hal_rcc.h"

-#endif /* HAL_RCC_MODULE_ENABLED */

-

-#ifdef HAL_EXTI_MODULE_ENABLED

-  #include "stm32f4xx_hal_exti.h"

-#endif /* HAL_EXTI_MODULE_ENABLED */

-

-#ifdef HAL_GPIO_MODULE_ENABLED

-  #include "stm32f4xx_hal_gpio.h"

-#endif /* HAL_GPIO_MODULE_ENABLED */

-

-#ifdef HAL_DMA_MODULE_ENABLED

-  #include "stm32f4xx_hal_dma.h"

-#endif /* HAL_DMA_MODULE_ENABLED */

-   

-#ifdef HAL_CORTEX_MODULE_ENABLED

-  #include "stm32f4xx_hal_cortex.h"

-#endif /* HAL_CORTEX_MODULE_ENABLED */

-

-#ifdef HAL_ADC_MODULE_ENABLED

-  #include "stm32f4xx_hal_adc.h"

-#endif /* HAL_ADC_MODULE_ENABLED */

-

-#ifdef HAL_CAN_MODULE_ENABLED

-  #include "stm32f4xx_hal_can.h"

-#endif /* HAL_CAN_MODULE_ENABLED */

-

-#ifdef HAL_CRC_MODULE_ENABLED

-  #include "stm32f4xx_hal_crc.h"

-#endif /* HAL_CRC_MODULE_ENABLED */

-

-#ifdef HAL_CRYP_MODULE_ENABLED

-  #include "stm32f4xx_hal_cryp.h" 

-#endif /* HAL_CRYP_MODULE_ENABLED */

-

-#ifdef HAL_SMBUS_MODULE_ENABLED

-#include "stm32f4xx_hal_smbus.h"

-#endif /* HAL_SMBUS_MODULE_ENABLED */

-

-#ifdef HAL_DMA2D_MODULE_ENABLED

-  #include "stm32f4xx_hal_dma2d.h"

-#endif /* HAL_DMA2D_MODULE_ENABLED */

-

-#ifdef HAL_DAC_MODULE_ENABLED

-  #include "stm32f4xx_hal_dac.h"

-#endif /* HAL_DAC_MODULE_ENABLED */

-

-#ifdef HAL_DCMI_MODULE_ENABLED

-  #include "stm32f4xx_hal_dcmi.h"

-#endif /* HAL_DCMI_MODULE_ENABLED */

-

-#ifdef HAL_ETH_MODULE_ENABLED

-  #include "stm32f4xx_hal_eth.h"

-#endif /* HAL_ETH_MODULE_ENABLED */

-

-#ifdef HAL_FLASH_MODULE_ENABLED

-  #include "stm32f4xx_hal_flash.h"

-#endif /* HAL_FLASH_MODULE_ENABLED */

- 

-#ifdef HAL_SRAM_MODULE_ENABLED

-  #include "stm32f4xx_hal_sram.h"

-#endif /* HAL_SRAM_MODULE_ENABLED */

-

-#ifdef HAL_NOR_MODULE_ENABLED

-  #include "stm32f4xx_hal_nor.h"

-#endif /* HAL_NOR_MODULE_ENABLED */

-

-#ifdef HAL_NAND_MODULE_ENABLED

-  #include "stm32f4xx_hal_nand.h"

-#endif /* HAL_NAND_MODULE_ENABLED */

-

-#ifdef HAL_PCCARD_MODULE_ENABLED

-  #include "stm32f4xx_hal_pccard.h"

-#endif /* HAL_PCCARD_MODULE_ENABLED */ 

-  

-#ifdef HAL_SDRAM_MODULE_ENABLED

-  #include "stm32f4xx_hal_sdram.h"

-#endif /* HAL_SDRAM_MODULE_ENABLED */      

-

-#ifdef HAL_HASH_MODULE_ENABLED

- #include "stm32f4xx_hal_hash.h"

-#endif /* HAL_HASH_MODULE_ENABLED */

-

-#ifdef HAL_I2C_MODULE_ENABLED

- #include "stm32f4xx_hal_i2c.h"

-#endif /* HAL_I2C_MODULE_ENABLED */

-

-#ifdef HAL_I2S_MODULE_ENABLED

- #include "stm32f4xx_hal_i2s.h"

-#endif /* HAL_I2S_MODULE_ENABLED */

-

-#ifdef HAL_IWDG_MODULE_ENABLED

- #include "stm32f4xx_hal_iwdg.h"

-#endif /* HAL_IWDG_MODULE_ENABLED */

-

-#ifdef HAL_LTDC_MODULE_ENABLED

- #include "stm32f4xx_hal_ltdc.h"

-#endif /* HAL_LTDC_MODULE_ENABLED */

-

-#ifdef HAL_PWR_MODULE_ENABLED

- #include "stm32f4xx_hal_pwr.h"

-#endif /* HAL_PWR_MODULE_ENABLED */

-

-#ifdef HAL_RNG_MODULE_ENABLED

- #include "stm32f4xx_hal_rng.h"

-#endif /* HAL_RNG_MODULE_ENABLED */

-

-#ifdef HAL_RTC_MODULE_ENABLED

- #include "stm32f4xx_hal_rtc.h"

-#endif /* HAL_RTC_MODULE_ENABLED */

-

-#ifdef HAL_SAI_MODULE_ENABLED

- #include "stm32f4xx_hal_sai.h"

-#endif /* HAL_SAI_MODULE_ENABLED */

-

-#ifdef HAL_SD_MODULE_ENABLED

- #include "stm32f4xx_hal_sd.h"

-#endif /* HAL_SD_MODULE_ENABLED */

-

-#ifdef HAL_MMC_MODULE_ENABLED

- #include "stm32f4xx_hal_mmc.h"

-#endif /* HAL_MMC_MODULE_ENABLED */

-

-#ifdef HAL_SPI_MODULE_ENABLED

- #include "stm32f4xx_hal_spi.h"

-#endif /* HAL_SPI_MODULE_ENABLED */

-

-#ifdef HAL_TIM_MODULE_ENABLED

- #include "stm32f4xx_hal_tim.h"

-#endif /* HAL_TIM_MODULE_ENABLED */

-

-#ifdef HAL_UART_MODULE_ENABLED

- #include "stm32f4xx_hal_uart.h"

-#endif /* HAL_UART_MODULE_ENABLED */

-

-#ifdef HAL_USART_MODULE_ENABLED

- #include "stm32f4xx_hal_usart.h"

-#endif /* HAL_USART_MODULE_ENABLED */

-

-#ifdef HAL_IRDA_MODULE_ENABLED

- #include "stm32f4xx_hal_irda.h"

-#endif /* HAL_IRDA_MODULE_ENABLED */

-

-#ifdef HAL_SMARTCARD_MODULE_ENABLED

- #include "stm32f4xx_hal_smartcard.h"

-#endif /* HAL_SMARTCARD_MODULE_ENABLED */

-

-#ifdef HAL_WWDG_MODULE_ENABLED

- #include "stm32f4xx_hal_wwdg.h"

-#endif /* HAL_WWDG_MODULE_ENABLED */

-

-#ifdef HAL_PCD_MODULE_ENABLED

- #include "stm32f4xx_hal_pcd.h"

-#endif /* HAL_PCD_MODULE_ENABLED */

-

-#ifdef HAL_HCD_MODULE_ENABLED

- #include "stm32f4xx_hal_hcd.h"

-#endif /* HAL_HCD_MODULE_ENABLED */

-   

-#ifdef HAL_DSI_MODULE_ENABLED

- #include "stm32f4xx_hal_dsi.h"

-#endif /* HAL_DSI_MODULE_ENABLED */

-

-#ifdef HAL_QSPI_MODULE_ENABLED

- #include "stm32f4xx_hal_qspi.h"

-#endif /* HAL_QSPI_MODULE_ENABLED */

-

-#ifdef HAL_CEC_MODULE_ENABLED

- #include "stm32f4xx_hal_cec.h"

-#endif /* HAL_CEC_MODULE_ENABLED */

-

-#ifdef HAL_FMPI2C_MODULE_ENABLED

- #include "stm32f4xx_hal_fmpi2c.h"

-#endif /* HAL_FMPI2C_MODULE_ENABLED */

-

-#ifdef HAL_SPDIFRX_MODULE_ENABLED

- #include "stm32f4xx_hal_spdifrx.h"

-#endif /* HAL_SPDIFRX_MODULE_ENABLED */

-

-#ifdef HAL_DFSDM_MODULE_ENABLED

- #include "stm32f4xx_hal_dfsdm.h"

-#endif /* HAL_DFSDM_MODULE_ENABLED */

-

-#ifdef HAL_LPTIM_MODULE_ENABLED

- #include "stm32f4xx_hal_lptim.h"

-#endif /* HAL_LPTIM_MODULE_ENABLED */

-   

-/* Exported macro ------------------------------------------------------------*/

-#ifdef  USE_FULL_ASSERT

-/**

-  * @brief  The assert_param macro is used for function's parameters check.

-  * @param  expr: If expr is false, it calls assert_failed function

-  *         which reports the name of the source file and the source

-  *         line number of the call that failed. 

-  *         If expr is true, it returns no value.

-  * @retval None

-  */

-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))

-/* Exported functions ------------------------------------------------------- */

-  void assert_failed(uint8_t* file, uint32_t line);

-#else

-  #define assert_param(expr) ((void)0U)

-#endif /* USE_FULL_ASSERT */    

-

-#ifdef __cplusplus

-}

-#endif

-

-#endif /* __STM32F4xx_HAL_CONF_H */

- 

-

-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

diff --git a/src/stm32f4xx_hal_msp.c b/src/stm32f4xx_hal_msp.c
deleted file mode 100644
index f379a96..0000000
--- a/src/stm32f4xx_hal_msp.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/* USER CODE BEGIN Header */

-/**

-  ******************************************************************************

-  * File Name          : stm32f4xx_hal_msp.c

-  * Description        : This file provides code for the MSP Initialization 

-  *                      and de-Initialization codes.

-  ******************************************************************************

-  * @attention

-  *

-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.

-  * All rights reserved.</center></h2>

-  *

-  * This software component is licensed by ST under BSD 3-Clause license,

-  * the "License"; You may not use this file except in compliance with the

-  * License. You may obtain a copy of the License at:

-  *                        opensource.org/licenses/BSD-3-Clause

-  *

-  ******************************************************************************

-  */

-/* USER CODE END Header */

-

-/* Includes ------------------------------------------------------------------*/

-#include "main.h"

-/* USER CODE BEGIN Includes */

-

-/* USER CODE END Includes */

-

-/* Private typedef -----------------------------------------------------------*/

-/* USER CODE BEGIN TD */

-

-/* USER CODE END TD */

-

-/* Private define ------------------------------------------------------------*/

-/* USER CODE BEGIN Define */

- 

-/* USER CODE END Define */

-

-/* Private macro -------------------------------------------------------------*/

-/* USER CODE BEGIN Macro */

-

-/* USER CODE END Macro */

-

-/* Private variables ---------------------------------------------------------*/

-/* USER CODE BEGIN PV */

-

-/* USER CODE END PV */

-

-/* Private function prototypes -----------------------------------------------*/

-/* USER CODE BEGIN PFP */

-

-/* USER CODE END PFP */

-

-/* External functions --------------------------------------------------------*/

-/* USER CODE BEGIN ExternalFunctions */

-

-/* USER CODE END ExternalFunctions */

-

-/* USER CODE BEGIN 0 */

-

-/* USER CODE END 0 */

-/**

-  * Initializes the Global MSP.

-  */

-void HAL_MspInit(void)

-{

-  /* USER CODE BEGIN MspInit 0 */

-

-  /* USER CODE END MspInit 0 */

-

-  __HAL_RCC_SYSCFG_CLK_ENABLE();

-  __HAL_RCC_PWR_CLK_ENABLE();

-

-  /* System interrupt init*/

-

-  /* USER CODE BEGIN MspInit 1 */

-

-  /* USER CODE END MspInit 1 */

-}

-

-/**

-* @brief I2C MSP Initialization

-* This function configures the hardware resources used in this example

-* @param hi2c: I2C handle pointer

-* @retval None

-*/

-void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)

-{

-  GPIO_InitTypeDef GPIO_InitStruct = {0};

-  if(hi2c->Instance==I2C1)

-  {

-  /* USER CODE BEGIN I2C1_MspInit 0 */

-

-  /* USER CODE END I2C1_MspInit 0 */

-  

-    __HAL_RCC_GPIOB_CLK_ENABLE();

-    /**I2C1 GPIO Configuration    

-    PB6     ------> I2C1_SCL

-    PB7     ------> I2C1_SDA 

-    */

-    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;

-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;

-    GPIO_InitStruct.Pull = GPIO_PULLUP;

-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;

-    GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;

-    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

-

-    /* Peripheral clock enable */

-    __HAL_RCC_I2C1_CLK_ENABLE();

-  /* USER CODE BEGIN I2C1_MspInit 1 */

-

-  /* USER CODE END I2C1_MspInit 1 */

-  }

-

-}

-

-/**

-* @brief I2C MSP De-Initialization

-* This function freeze the hardware resources used in this example

-* @param hi2c: I2C handle pointer

-* @retval None

-*/

-void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)

-{

-  if(hi2c->Instance==I2C1)

-  {

-  /* USER CODE BEGIN I2C1_MspDeInit 0 */

-

-  /* USER CODE END I2C1_MspDeInit 0 */

-    /* Peripheral clock disable */

-    __HAL_RCC_I2C1_CLK_DISABLE();

-  

-    /**I2C1 GPIO Configuration    

-    PB6     ------> I2C1_SCL

-    PB7     ------> I2C1_SDA 

-    */

-    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);

-

-  /* USER CODE BEGIN I2C1_MspDeInit 1 */

-

-  /* USER CODE END I2C1_MspDeInit 1 */

-  }

-

-}

-

-/**

-* @brief UART MSP Initialization

-* This function configures the hardware resources used in this example

-* @param huart: UART handle pointer

-* @retval None

-*/

-void HAL_UART_MspInit(UART_HandleTypeDef* huart)

-{

-  GPIO_InitTypeDef GPIO_InitStruct = {0};

-  if(huart->Instance==USART1)

-  {

-  /* USER CODE BEGIN USART1_MspInit 0 */

-

-  /* USER CODE END USART1_MspInit 0 */

-    /* Peripheral clock enable */

-    __HAL_RCC_USART1_CLK_ENABLE();

-  

-    __HAL_RCC_GPIOA_CLK_ENABLE();

-    /**USART1 GPIO Configuration    

-    PA9     ------> USART1_TX

-    PA10     ------> USART1_RX 

-    */

-    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;

-    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;

-    GPIO_InitStruct.Pull = GPIO_PULLUP;

-    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;

-    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;

-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

-

-  /* USER CODE BEGIN USART1_MspInit 1 */

-

-  /* USER CODE END USART1_MspInit 1 */

-  }

-  else if(huart->Instance==USART2)

-  {

-      /* USER CODE BEGIN USART2_MspInit 0 */

-

-      /* USER CODE END USART2_MspInit 0 */

-      /* Peripheral clock enable */

-      __HAL_RCC_USART2_CLK_ENABLE();

-  

-      __HAL_RCC_GPIOA_CLK_ENABLE();

-      /**USART2 GPIO Configuration    

-	 PA2     ------> USART2_TX

-	 PA3     ------> USART2_RX 

-      */

-      GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;

-      GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;

-      GPIO_InitStruct.Pull = GPIO_PULLUP;

-      GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;

-      GPIO_InitStruct.Alternate = GPIO_AF7_USART2;

-      HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

-

-      /* USER CODE BEGIN USART2_MspInit 1 */

-

-      /* USER CODE END USART2_MspInit 1 */

-  }

-}

-

-/**

-* @brief UART MSP De-Initialization

-* This function freeze the hardware resources used in this example

-* @param huart: UART handle pointer

-* @retval None

-*/

-void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)

-{

-  if(huart->Instance==USART1)

-  {

-  /* USER CODE BEGIN USART1_MspDeInit 0 */

-

-  /* USER CODE END USART1_MspDeInit 0 */

-    /* Peripheral clock disable */

-    __HAL_RCC_USART1_CLK_DISABLE();

-  

-    /**USART1 GPIO Configuration    

-    PA9     ------> USART1_TX

-    PA10     ------> USART1_RX 

-    */

-    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);

-

-  /* USER CODE BEGIN USART1_MspDeInit 1 */

-

-  /* USER CODE END USART1_MspDeInit 1 */

-  }

-

-}

-

-/* USER CODE BEGIN 1 */

-

-/* USER CODE END 1 */

-

-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

diff --git a/src/stm32f4xx_it.c b/src/stm32f4xx_it.c
deleted file mode 100644
index caabfb4..0000000
--- a/src/stm32f4xx_it.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* USER CODE BEGIN Header */

-/**

-  ******************************************************************************

-  * @file    stm32f4xx_it.c

-  * @brief   Interrupt Service Routines.

-  ******************************************************************************

-  * @attention

-  *

-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.

-  * All rights reserved.</center></h2>

-  *

-  * This software component is licensed by ST under BSD 3-Clause license,

-  * the "License"; You may not use this file except in compliance with the

-  * License. You may obtain a copy of the License at:

-  *                        opensource.org/licenses/BSD-3-Clause

-  *

-  ******************************************************************************

-  */

-/* USER CODE END Header */

-

-/* Includes ------------------------------------------------------------------*/

-#include "main.h"

-#include "stm32f4xx_it.h"

-/* Private includes ----------------------------------------------------------*/

-/* USER CODE BEGIN Includes */

-/* USER CODE END Includes */

-

-/* Private typedef -----------------------------------------------------------*/

-/* USER CODE BEGIN TD */

-

-/* USER CODE END TD */

-

-/* Private define ------------------------------------------------------------*/

-/* USER CODE BEGIN PD */

- 

-/* USER CODE END PD */

-

-/* Private macro -------------------------------------------------------------*/

-/* USER CODE BEGIN PM */

-

-/* USER CODE END PM */

-

-/* Private variables ---------------------------------------------------------*/

-/* USER CODE BEGIN PV */

-

-/* USER CODE END PV */

-

-/* Private function prototypes -----------------------------------------------*/

-/* USER CODE BEGIN PFP */

-

-/* USER CODE END PFP */

-

-/* Private user code ---------------------------------------------------------*/

-/* USER CODE BEGIN 0 */

-

-/* USER CODE END 0 */

-

-/* External variables --------------------------------------------------------*/

-

-/* USER CODE BEGIN EV */

-

-/* USER CODE END EV */

-

-/******************************************************************************/

-/*           Cortex-M4 Processor Interruption and Exception Handlers          */ 

-/******************************************************************************/

-/**

-  * @brief This function handles Non maskable interrupt.

-  */

-void NMI_Handler(void)

-{

-  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

-

-  /* USER CODE END NonMaskableInt_IRQn 0 */

-  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */

-

-  /* USER CODE END NonMaskableInt_IRQn 1 */

-}

-

-/**

-  * @brief This function handles Hard fault interrupt.

-  */

-void HardFault_Handler(void)

-{

-  /* USER CODE BEGIN HardFault_IRQn 0 */

-

-  /* USER CODE END HardFault_IRQn 0 */

-  while (1)

-  {

-    /* USER CODE BEGIN W1_HardFault_IRQn 0 */

-    /* USER CODE END W1_HardFault_IRQn 0 */

-  }

-}

-

-/**

-  * @brief This function handles Memory management fault.

-  */

-void MemManage_Handler(void)

-{

-  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

-

-  /* USER CODE END MemoryManagement_IRQn 0 */

-  while (1)

-  {

-    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */

-    /* USER CODE END W1_MemoryManagement_IRQn 0 */

-  }

-}

-

-/**

-  * @brief This function handles Pre-fetch fault, memory access fault.

-  */

-void BusFault_Handler(void)

-{

-  /* USER CODE BEGIN BusFault_IRQn 0 */

-

-  /* USER CODE END BusFault_IRQn 0 */

-  while (1)

-  {

-    /* USER CODE BEGIN W1_BusFault_IRQn 0 */

-    /* USER CODE END W1_BusFault_IRQn 0 */

-  }

-}

-

-/**

-  * @brief This function handles Undefined instruction or illegal state.

-  */

-void UsageFault_Handler(void)

-{

-  /* USER CODE BEGIN UsageFault_IRQn 0 */

-

-  /* USER CODE END UsageFault_IRQn 0 */

-  while (1)

-  {

-    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */

-    /* USER CODE END W1_UsageFault_IRQn 0 */

-  }

-}

-

-/**

-  * @brief This function handles System service call via SWI instruction.

-  */

-void SVC_Handler(void)

-{

-  /* USER CODE BEGIN SVCall_IRQn 0 */

-

-  /* USER CODE END SVCall_IRQn 0 */

-  /* USER CODE BEGIN SVCall_IRQn 1 */

-

-  /* USER CODE END SVCall_IRQn 1 */

-}

-

-/**

-  * @brief This function handles Debug monitor.

-  */

-void DebugMon_Handler(void)

-{

-  /* USER CODE BEGIN DebugMonitor_IRQn 0 */

-

-  /* USER CODE END DebugMonitor_IRQn 0 */

-  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

-

-  /* USER CODE END DebugMonitor_IRQn 1 */

-}

-

-/**

-  * @brief This function handles Pendable request for system service.

-  */

-void PendSV_Handler(void)

-{

-  /* USER CODE BEGIN PendSV_IRQn 0 */

-

-  /* USER CODE END PendSV_IRQn 0 */

-  /* USER CODE BEGIN PendSV_IRQn 1 */

-

-  /* USER CODE END PendSV_IRQn 1 */

-}

-

-/**

-  * @brief This function handles System tick timer.

-  */

-void SysTick_Handler(void)

-{

-  /* USER CODE BEGIN SysTick_IRQn 0 */

-

-  /* USER CODE END SysTick_IRQn 0 */

-  HAL_IncTick();

-  /* USER CODE BEGIN SysTick_IRQn 1 */

-

-  /* USER CODE END SysTick_IRQn 1 */

-}

-

-/******************************************************************************/

-/* STM32F4xx Peripheral Interrupt Handlers                                    */

-/* Add here the Interrupt Handlers for the used peripherals.                  */

-/* For the available peripheral interrupt handler names,                      */

-/* please refer to the startup file (startup_stm32f4xx.s).                    */

-/******************************************************************************/

-

-/* USER CODE BEGIN 1 */

-

-/* USER CODE END 1 */

-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

diff --git a/src/stm32f4xx_it.h b/src/stm32f4xx_it.h
deleted file mode 100644
index 0f787d0..0000000
--- a/src/stm32f4xx_it.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* USER CODE BEGIN Header */

-/**

-  ******************************************************************************

-  * @file    stm32f4xx_it.h

-  * @brief   This file contains the headers of the interrupt handlers.

-  ******************************************************************************

-  * @attention

-  *

-  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.

-  * All rights reserved.</center></h2>

-  *

-  * This software component is licensed by ST under BSD 3-Clause license,

-  * the "License"; You may not use this file except in compliance with the

-  * License. You may obtain a copy of the License at:

-  *                        opensource.org/licenses/BSD-3-Clause

-  *

- ******************************************************************************

-  */

-/* USER CODE END Header */

-

-/* Define to prevent recursive inclusion -------------------------------------*/

-#ifndef __STM32F4xx_IT_H

-#define __STM32F4xx_IT_H

-

-#ifdef __cplusplus

- extern "C" {

-#endif 

-

-/* Private includes ----------------------------------------------------------*/

-/* USER CODE BEGIN Includes */

-

-/* USER CODE END Includes */

-

-/* Exported types ------------------------------------------------------------*/

-/* USER CODE BEGIN ET */

-

-/* USER CODE END ET */

-

-/* Exported constants --------------------------------------------------------*/

-/* USER CODE BEGIN EC */

-

-/* USER CODE END EC */

-

-/* Exported macro ------------------------------------------------------------*/

-/* USER CODE BEGIN EM */

-

-/* USER CODE END EM */

-

-/* Exported functions prototypes ---------------------------------------------*/

-void NMI_Handler(void);

-void HardFault_Handler(void);

-void MemManage_Handler(void);

-void BusFault_Handler(void);

-void UsageFault_Handler(void);

-void SVC_Handler(void);

-void DebugMon_Handler(void);

-void PendSV_Handler(void);

-void SysTick_Handler(void);

-/* USER CODE BEGIN EFP */

-

-/* USER CODE END EFP */

-

-#ifdef __cplusplus

-}

-#endif

-

-#endif /* __STM32F4xx_IT_H */

-

-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

diff --git a/src/system_stm32f4xx.c b/src/system_stm32f4xx.c
deleted file mode 100644
index 7745026..0000000
--- a/src/system_stm32f4xx.c
+++ /dev/null
@@ -1,743 +0,0 @@
-/**

-  ******************************************************************************

-  * @file    system_stm32f4xx.c

-  * @author  MCD Application Team

-  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.

-  *

-  *   This file provides two functions and one global variable to be called from 

-  *   user application:

-  *      - SystemInit(): This function is called at startup just after reset and 

-  *                      before branch to main program. This call is made inside

-  *                      the "startup_stm32f4xx.s" file.

-  *

-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used

-  *                                  by the user application to setup the SysTick 

-  *                                  timer or configure other parameters.

-  *                                     

-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must

-  *                                 be called whenever the core clock is changed

-  *                                 during program execution.

-  *

-  *

-  ******************************************************************************

-  * @attention

-  *

-  * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>

-  *

-  * Redistribution and use in source and binary forms, with or without modification,

-  * are permitted provided that the following conditions are met:

-  *   1. Redistributions of source code must retain the above copyright notice,

-  *      this list of conditions and the following disclaimer.

-  *   2. Redistributions in binary form must reproduce the above copyright notice,

-  *      this list of conditions and the following disclaimer in the documentation

-  *      and/or other materials provided with the distribution.

-  *   3. Neither the name of STMicroelectronics nor the names of its contributors

-  *      may be used to endorse or promote products derived from this software

-  *      without specific prior written permission.

-  *

-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE

-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR

-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER

-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-  *

-  ******************************************************************************

-  */

-

-/** @addtogroup CMSIS

-  * @{

-  */

-

-/** @addtogroup stm32f4xx_system

-  * @{

-  */  

-  

-/** @addtogroup STM32F4xx_System_Private_Includes

-  * @{

-  */

-

-

-#include "stm32f4xx.h"

-

-#if !defined  (HSE_VALUE) 

-  #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */

-#endif /* HSE_VALUE */

-

-#if !defined  (HSI_VALUE)

-  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/

-#endif /* HSI_VALUE */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32F4xx_System_Private_TypesDefinitions

-  * @{

-  */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32F4xx_System_Private_Defines

-  * @{

-  */

-

-/************************* Miscellaneous Configuration ************************/

-/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */

-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\

- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\

- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)

-/* #define DATA_IN_ExtSRAM */

-#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\

-          STM32F412Zx || STM32F412Vx */

- 

-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\

- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)

-/* #define DATA_IN_ExtSDRAM */

-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\

-          STM32F479xx */

-

-/*!< Uncomment the following line if you need to relocate your vector Table in

-     Internal SRAM. */

-/* #define VECT_TAB_SRAM */

-#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 

-                                   This value must be a multiple of 0x200. */

-/******************************************************************************/

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32F4xx_System_Private_Macros

-  * @{

-  */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32F4xx_System_Private_Variables

-  * @{

-  */

-  /* This variable is updated in three ways:

-      1) by calling CMSIS function SystemCoreClockUpdate()

-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()

-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 

-         Note: If you use this function to configure the system clock; then there

-               is no need to call the 2 first functions listed above, since SystemCoreClock

-               variable is updated automatically.

-  */

-uint32_t SystemCoreClock = 16000000;

-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};

-const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};

-/**

-  * @}

-  */

-

-/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes

-  * @{

-  */

-

-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)

-  static void SystemInit_ExtMemCtl(void); 

-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */

-

-/**

-  * @}

-  */

-

-/** @addtogroup STM32F4xx_System_Private_Functions

-  * @{

-  */

-

-/**

-  * @brief  Setup the microcontroller system

-  *         Initialize the FPU setting, vector table location and External memory 

-  *         configuration.

-  * @param  None

-  * @retval None

-  */

-void SystemInit(void)

-{

-  /* FPU settings ------------------------------------------------------------*/

-  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)

-    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */

-  #endif

-

-#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)

-  SystemInit_ExtMemCtl(); 

-#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */

-

-  /* Configure the Vector Table location add offset address ------------------*/

-#ifdef VECT_TAB_SRAM

-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */

-#else

-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */

-#endif

-}

-

-/**

-   * @brief  Update SystemCoreClock variable according to Clock Register Values.

-  *         The SystemCoreClock variable contains the core clock (HCLK), it can

-  *         be used by the user application to setup the SysTick timer or configure

-  *         other parameters.

-  *           

-  * @note   Each time the core clock (HCLK) changes, this function must be called

-  *         to update SystemCoreClock variable value. Otherwise, any configuration

-  *         based on this variable will be incorrect.         

-  *     

-  * @note   - The system frequency computed by this function is not the real 

-  *           frequency in the chip. It is calculated based on the predefined 

-  *           constant and the selected clock source:

-  *             

-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)

-  *                                              

-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)

-  *                          

-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 

-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.

-  *         

-  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value

-  *             16 MHz) but the real value may vary depending on the variations

-  *             in voltage and temperature.   

-  *    

-  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value

-  *              depends on the application requirements), user has to ensure that HSE_VALUE

-  *              is same as the real frequency of the crystal used. Otherwise, this function

-  *              may have wrong result.

-  *                

-  *         - The result of this function could be not correct when using fractional

-  *           value for HSE crystal.

-  *     

-  * @param  None

-  * @retval None

-  */

-void SystemCoreClockUpdate(void)

-{

-  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;

-  

-  /* Get SYSCLK source -------------------------------------------------------*/

-  tmp = RCC->CFGR & RCC_CFGR_SWS;

-

-  switch (tmp)

-  {

-    case 0x00:  /* HSI used as system clock source */

-      SystemCoreClock = HSI_VALUE;

-      break;

-    case 0x04:  /* HSE used as system clock source */

-      SystemCoreClock = HSE_VALUE;

-      break;

-    case 0x08:  /* PLL used as system clock source */

-

-      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N

-         SYSCLK = PLL_VCO / PLL_P

-         */    

-      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;

-      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;

-      

-      if (pllsource != 0)

-      {

-        /* HSE used as PLL clock source */

-        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);

-      }

-      else

-      {

-        /* HSI used as PLL clock source */

-        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);

-      }

-

-      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;

-      SystemCoreClock = pllvco/pllp;

-      break;

-    default:

-      SystemCoreClock = HSI_VALUE;

-      break;

-  }

-  /* Compute HCLK frequency --------------------------------------------------*/

-  /* Get HCLK prescaler */

-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];

-  /* HCLK frequency */

-  SystemCoreClock >>= tmp;

-}

-

-#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)

-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\

- || defined(STM32F469xx) || defined(STM32F479xx)

-/**

-  * @brief  Setup the external memory controller.

-  *         Called in startup_stm32f4xx.s before jump to main.

-  *         This function configures the external memories (SRAM/SDRAM)

-  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).

-  * @param  None

-  * @retval None

-  */

-void SystemInit_ExtMemCtl(void)

-{

-  __IO uint32_t tmp = 0x00;

-

-  register uint32_t tmpreg = 0, timeout = 0xFFFF;

-  register __IO uint32_t index;

-

-  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */

-  RCC->AHB1ENR |= 0x000001F8;

-

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);

-  

-  /* Connect PDx pins to FMC Alternate function */

-  GPIOD->AFR[0]  = 0x00CCC0CC;

-  GPIOD->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PDx pins in Alternate function mode */  

-  GPIOD->MODER   = 0xAAAA0A8A;

-  /* Configure PDx pins speed to 100 MHz */  

-  GPIOD->OSPEEDR = 0xFFFF0FCF;

-  /* Configure PDx pins Output type to push-pull */  

-  GPIOD->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PDx pins */ 

-  GPIOD->PUPDR   = 0x00000000;

-

-  /* Connect PEx pins to FMC Alternate function */

-  GPIOE->AFR[0]  = 0xC00CC0CC;

-  GPIOE->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PEx pins in Alternate function mode */ 

-  GPIOE->MODER   = 0xAAAA828A;

-  /* Configure PEx pins speed to 100 MHz */ 

-  GPIOE->OSPEEDR = 0xFFFFC3CF;

-  /* Configure PEx pins Output type to push-pull */  

-  GPIOE->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PEx pins */ 

-  GPIOE->PUPDR   = 0x00000000;

-  

-  /* Connect PFx pins to FMC Alternate function */

-  GPIOF->AFR[0]  = 0xCCCCCCCC;

-  GPIOF->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PFx pins in Alternate function mode */   

-  GPIOF->MODER   = 0xAA800AAA;

-  /* Configure PFx pins speed to 50 MHz */ 

-  GPIOF->OSPEEDR = 0xAA800AAA;

-  /* Configure PFx pins Output type to push-pull */  

-  GPIOF->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PFx pins */ 

-  GPIOF->PUPDR   = 0x00000000;

-

-  /* Connect PGx pins to FMC Alternate function */

-  GPIOG->AFR[0]  = 0xCCCCCCCC;

-  GPIOG->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PGx pins in Alternate function mode */ 

-  GPIOG->MODER   = 0xAAAAAAAA;

-  /* Configure PGx pins speed to 50 MHz */ 

-  GPIOG->OSPEEDR = 0xAAAAAAAA;

-  /* Configure PGx pins Output type to push-pull */  

-  GPIOG->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PGx pins */ 

-  GPIOG->PUPDR   = 0x00000000;

-  

-  /* Connect PHx pins to FMC Alternate function */

-  GPIOH->AFR[0]  = 0x00C0CC00;

-  GPIOH->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PHx pins in Alternate function mode */ 

-  GPIOH->MODER   = 0xAAAA08A0;

-  /* Configure PHx pins speed to 50 MHz */ 

-  GPIOH->OSPEEDR = 0xAAAA08A0;

-  /* Configure PHx pins Output type to push-pull */  

-  GPIOH->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PHx pins */ 

-  GPIOH->PUPDR   = 0x00000000;

-  

-  /* Connect PIx pins to FMC Alternate function */

-  GPIOI->AFR[0]  = 0xCCCCCCCC;

-  GPIOI->AFR[1]  = 0x00000CC0;

-  /* Configure PIx pins in Alternate function mode */ 

-  GPIOI->MODER   = 0x0028AAAA;

-  /* Configure PIx pins speed to 50 MHz */ 

-  GPIOI->OSPEEDR = 0x0028AAAA;

-  /* Configure PIx pins Output type to push-pull */  

-  GPIOI->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PIx pins */ 

-  GPIOI->PUPDR   = 0x00000000;

-  

-/*-- FMC Configuration -------------------------------------------------------*/

-  /* Enable the FMC interface clock */

-  RCC->AHB3ENR |= 0x00000001;

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);

-

-  FMC_Bank5_6->SDCR[0] = 0x000019E4;

-  FMC_Bank5_6->SDTR[0] = 0x01115351;      

-  

-  /* SDRAM initialization sequence */

-  /* Clock enable command */

-  FMC_Bank5_6->SDCMR = 0x00000011; 

-  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  }

-

-  /* Delay */

-  for (index = 0; index<1000; index++);

-  

-  /* PALL command */

-  FMC_Bank5_6->SDCMR = 0x00000012;           

-  timeout = 0xFFFF;

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  }

-  

-  /* Auto refresh command */

-  FMC_Bank5_6->SDCMR = 0x00000073;

-  timeout = 0xFFFF;

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  }

- 

-  /* MRD register program */

-  FMC_Bank5_6->SDCMR = 0x00046014;

-  timeout = 0xFFFF;

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  } 

-  

-  /* Set refresh count */

-  tmpreg = FMC_Bank5_6->SDRTR;

-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));

-  

-  /* Disable write protection */

-  tmpreg = FMC_Bank5_6->SDCR[0]; 

-  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);

-

-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)

-  /* Configure and enable Bank1_SRAM2 */

-  FMC_Bank1->BTCR[2]  = 0x00001011;

-  FMC_Bank1->BTCR[3]  = 0x00000201;

-  FMC_Bank1E->BWTR[2] = 0x0fffffff;

-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 

-#if defined(STM32F469xx) || defined(STM32F479xx)

-  /* Configure and enable Bank1_SRAM2 */

-  FMC_Bank1->BTCR[2]  = 0x00001091;

-  FMC_Bank1->BTCR[3]  = 0x00110212;

-  FMC_Bank1E->BWTR[2] = 0x0fffffff;

-#endif /* STM32F469xx || STM32F479xx */

-

-  (void)(tmp); 

-}

-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */

-#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)

-/**

-  * @brief  Setup the external memory controller.

-  *         Called in startup_stm32f4xx.s before jump to main.

-  *         This function configures the external memories (SRAM/SDRAM)

-  *         This SRAM/SDRAM will be used as program data memory (including heap and stack).

-  * @param  None

-  * @retval None

-  */

-void SystemInit_ExtMemCtl(void)

-{

-  __IO uint32_t tmp = 0x00;

-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\

- || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)

-#if defined (DATA_IN_ExtSDRAM)

-  register uint32_t tmpreg = 0, timeout = 0xFFFF;

-  register __IO uint32_t index;

-

-#if defined(STM32F446xx)

-  /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface

-      clock */

-  RCC->AHB1ENR |= 0x0000007D;

-#else

-  /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface 

-      clock */

-  RCC->AHB1ENR |= 0x000001F8;

-#endif /* STM32F446xx */  

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);

-  

-#if defined(STM32F446xx)

-  /* Connect PAx pins to FMC Alternate function */

-  GPIOA->AFR[0]  |= 0xC0000000;

-  GPIOA->AFR[1]  |= 0x00000000;

-  /* Configure PDx pins in Alternate function mode */

-  GPIOA->MODER   |= 0x00008000;

-  /* Configure PDx pins speed to 50 MHz */

-  GPIOA->OSPEEDR |= 0x00008000;

-  /* Configure PDx pins Output type to push-pull */

-  GPIOA->OTYPER  |= 0x00000000;

-  /* No pull-up, pull-down for PDx pins */

-  GPIOA->PUPDR   |= 0x00000000;

-

-  /* Connect PCx pins to FMC Alternate function */

-  GPIOC->AFR[0]  |= 0x00CC0000;

-  GPIOC->AFR[1]  |= 0x00000000;

-  /* Configure PDx pins in Alternate function mode */

-  GPIOC->MODER   |= 0x00000A00;

-  /* Configure PDx pins speed to 50 MHz */

-  GPIOC->OSPEEDR |= 0x00000A00;

-  /* Configure PDx pins Output type to push-pull */

-  GPIOC->OTYPER  |= 0x00000000;

-  /* No pull-up, pull-down for PDx pins */

-  GPIOC->PUPDR   |= 0x00000000;

-#endif /* STM32F446xx */

-

-  /* Connect PDx pins to FMC Alternate function */

-  GPIOD->AFR[0]  = 0x000000CC;

-  GPIOD->AFR[1]  = 0xCC000CCC;

-  /* Configure PDx pins in Alternate function mode */  

-  GPIOD->MODER   = 0xA02A000A;

-  /* Configure PDx pins speed to 50 MHz */  

-  GPIOD->OSPEEDR = 0xA02A000A;

-  /* Configure PDx pins Output type to push-pull */  

-  GPIOD->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PDx pins */ 

-  GPIOD->PUPDR   = 0x00000000;

-

-  /* Connect PEx pins to FMC Alternate function */

-  GPIOE->AFR[0]  = 0xC00000CC;

-  GPIOE->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PEx pins in Alternate function mode */ 

-  GPIOE->MODER   = 0xAAAA800A;

-  /* Configure PEx pins speed to 50 MHz */ 

-  GPIOE->OSPEEDR = 0xAAAA800A;

-  /* Configure PEx pins Output type to push-pull */  

-  GPIOE->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PEx pins */ 

-  GPIOE->PUPDR   = 0x00000000;

-

-  /* Connect PFx pins to FMC Alternate function */

-  GPIOF->AFR[0]  = 0xCCCCCCCC;

-  GPIOF->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PFx pins in Alternate function mode */   

-  GPIOF->MODER   = 0xAA800AAA;

-  /* Configure PFx pins speed to 50 MHz */ 

-  GPIOF->OSPEEDR = 0xAA800AAA;

-  /* Configure PFx pins Output type to push-pull */  

-  GPIOF->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PFx pins */ 

-  GPIOF->PUPDR   = 0x00000000;

-

-  /* Connect PGx pins to FMC Alternate function */

-  GPIOG->AFR[0]  = 0xCCCCCCCC;

-  GPIOG->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PGx pins in Alternate function mode */ 

-  GPIOG->MODER   = 0xAAAAAAAA;

-  /* Configure PGx pins speed to 50 MHz */ 

-  GPIOG->OSPEEDR = 0xAAAAAAAA;

-  /* Configure PGx pins Output type to push-pull */  

-  GPIOG->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PGx pins */ 

-  GPIOG->PUPDR   = 0x00000000;

-

-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\

- || defined(STM32F469xx) || defined(STM32F479xx)  

-  /* Connect PHx pins to FMC Alternate function */

-  GPIOH->AFR[0]  = 0x00C0CC00;

-  GPIOH->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PHx pins in Alternate function mode */ 

-  GPIOH->MODER   = 0xAAAA08A0;

-  /* Configure PHx pins speed to 50 MHz */ 

-  GPIOH->OSPEEDR = 0xAAAA08A0;

-  /* Configure PHx pins Output type to push-pull */  

-  GPIOH->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PHx pins */ 

-  GPIOH->PUPDR   = 0x00000000;

-  

-  /* Connect PIx pins to FMC Alternate function */

-  GPIOI->AFR[0]  = 0xCCCCCCCC;

-  GPIOI->AFR[1]  = 0x00000CC0;

-  /* Configure PIx pins in Alternate function mode */ 

-  GPIOI->MODER   = 0x0028AAAA;

-  /* Configure PIx pins speed to 50 MHz */ 

-  GPIOI->OSPEEDR = 0x0028AAAA;

-  /* Configure PIx pins Output type to push-pull */  

-  GPIOI->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PIx pins */ 

-  GPIOI->PUPDR   = 0x00000000;

-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */

-  

-/*-- FMC Configuration -------------------------------------------------------*/

-  /* Enable the FMC interface clock */

-  RCC->AHB3ENR |= 0x00000001;

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);

-

-  /* Configure and enable SDRAM bank1 */

-#if defined(STM32F446xx)

-  FMC_Bank5_6->SDCR[0] = 0x00001954;

-#else  

-  FMC_Bank5_6->SDCR[0] = 0x000019E4;

-#endif /* STM32F446xx */

-  FMC_Bank5_6->SDTR[0] = 0x01115351;      

-  

-  /* SDRAM initialization sequence */

-  /* Clock enable command */

-  FMC_Bank5_6->SDCMR = 0x00000011; 

-  tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  }

-

-  /* Delay */

-  for (index = 0; index<1000; index++);

-  

-  /* PALL command */

-  FMC_Bank5_6->SDCMR = 0x00000012;           

-  timeout = 0xFFFF;

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  }

-  

-  /* Auto refresh command */

-#if defined(STM32F446xx)

-  FMC_Bank5_6->SDCMR = 0x000000F3;

-#else  

-  FMC_Bank5_6->SDCMR = 0x00000073;

-#endif /* STM32F446xx */

-  timeout = 0xFFFF;

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  }

- 

-  /* MRD register program */

-#if defined(STM32F446xx)

-  FMC_Bank5_6->SDCMR = 0x00044014;

-#else  

-  FMC_Bank5_6->SDCMR = 0x00046014;

-#endif /* STM32F446xx */

-  timeout = 0xFFFF;

-  while((tmpreg != 0) && (timeout-- > 0))

-  {

-    tmpreg = FMC_Bank5_6->SDSR & 0x00000020; 

-  } 

-  

-  /* Set refresh count */

-  tmpreg = FMC_Bank5_6->SDRTR;

-#if defined(STM32F446xx)

-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));

-#else    

-  FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));

-#endif /* STM32F446xx */

-  

-  /* Disable write protection */

-  tmpreg = FMC_Bank5_6->SDCR[0]; 

-  FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);

-#endif /* DATA_IN_ExtSDRAM */

-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */

-

-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\

- || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\

- || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)

-

-#if defined(DATA_IN_ExtSRAM)

-/*-- GPIOs Configuration -----------------------------------------------------*/

-   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */

-  RCC->AHB1ENR   |= 0x00000078;

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);

-  

-  /* Connect PDx pins to FMC Alternate function */

-  GPIOD->AFR[0]  = 0x00CCC0CC;

-  GPIOD->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PDx pins in Alternate function mode */  

-  GPIOD->MODER   = 0xAAAA0A8A;

-  /* Configure PDx pins speed to 100 MHz */  

-  GPIOD->OSPEEDR = 0xFFFF0FCF;

-  /* Configure PDx pins Output type to push-pull */  

-  GPIOD->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PDx pins */ 

-  GPIOD->PUPDR   = 0x00000000;

-

-  /* Connect PEx pins to FMC Alternate function */

-  GPIOE->AFR[0]  = 0xC00CC0CC;

-  GPIOE->AFR[1]  = 0xCCCCCCCC;

-  /* Configure PEx pins in Alternate function mode */ 

-  GPIOE->MODER   = 0xAAAA828A;

-  /* Configure PEx pins speed to 100 MHz */ 

-  GPIOE->OSPEEDR = 0xFFFFC3CF;

-  /* Configure PEx pins Output type to push-pull */  

-  GPIOE->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PEx pins */ 

-  GPIOE->PUPDR   = 0x00000000;

-

-  /* Connect PFx pins to FMC Alternate function */

-  GPIOF->AFR[0]  = 0x00CCCCCC;

-  GPIOF->AFR[1]  = 0xCCCC0000;

-  /* Configure PFx pins in Alternate function mode */   

-  GPIOF->MODER   = 0xAA000AAA;

-  /* Configure PFx pins speed to 100 MHz */ 

-  GPIOF->OSPEEDR = 0xFF000FFF;

-  /* Configure PFx pins Output type to push-pull */  

-  GPIOF->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PFx pins */ 

-  GPIOF->PUPDR   = 0x00000000;

-

-  /* Connect PGx pins to FMC Alternate function */

-  GPIOG->AFR[0]  = 0x00CCCCCC;

-  GPIOG->AFR[1]  = 0x000000C0;

-  /* Configure PGx pins in Alternate function mode */ 

-  GPIOG->MODER   = 0x00085AAA;

-  /* Configure PGx pins speed to 100 MHz */ 

-  GPIOG->OSPEEDR = 0x000CAFFF;

-  /* Configure PGx pins Output type to push-pull */  

-  GPIOG->OTYPER  = 0x00000000;

-  /* No pull-up, pull-down for PGx pins */ 

-  GPIOG->PUPDR   = 0x00000000;

-  

-/*-- FMC/FSMC Configuration --------------------------------------------------*/

-  /* Enable the FMC/FSMC interface clock */

-  RCC->AHB3ENR         |= 0x00000001;

-

-#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);

-  /* Configure and enable Bank1_SRAM2 */

-  FMC_Bank1->BTCR[2]  = 0x00001011;

-  FMC_Bank1->BTCR[3]  = 0x00000201;

-  FMC_Bank1E->BWTR[2] = 0x0fffffff;

-#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 

-#if defined(STM32F469xx) || defined(STM32F479xx)

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);

-  /* Configure and enable Bank1_SRAM2 */

-  FMC_Bank1->BTCR[2]  = 0x00001091;

-  FMC_Bank1->BTCR[3]  = 0x00110212;

-  FMC_Bank1E->BWTR[2] = 0x0fffffff;

-#endif /* STM32F469xx || STM32F479xx */

-#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\

-   || defined(STM32F412Zx) || defined(STM32F412Vx)

-  /* Delay after an RCC peripheral clock enabling */

-  tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);

-  /* Configure and enable Bank1_SRAM2 */

-  FSMC_Bank1->BTCR[2]  = 0x00001011;

-  FSMC_Bank1->BTCR[3]  = 0x00000201;

-  FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;

-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */

-

-#endif /* DATA_IN_ExtSRAM */

-#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\

-          STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx  */ 

-  (void)(tmp); 

-}

-#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */

-/**

-  * @}

-  */

-

-/**

-  * @}

-  */

-

-/**

-  * @}

-  */

-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/