blob: f9f7d74a49c73c571df66f641fee8bd1550b059e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
|
// SPDX-License-Identifier: Apache-2.0
package firrtlTests
package annotationTests
import firrtl._
import firrtl.testutils.FirrtlFlatSpec
import firrtl.annotations.{Annotation, NoTargetAnnotation}
import firrtl.stage.{FirrtlCircuitAnnotation, FirrtlStage, RunFirrtlTransformAnnotation}
case object FoundTargetDirTransformRanAnnotation extends NoTargetAnnotation
case object FoundTargetDirTransformFoundTargetDirAnnotation extends NoTargetAnnotation
/** Looks for [[TargetDirAnnotation]] */
class FindTargetDirTransform extends Transform {
def inputForm = HighForm
def outputForm = HighForm
def execute(state: CircuitState): CircuitState = {
val a: Option[Annotation] = state.annotations.collectFirst {
case TargetDirAnnotation("a/b/c") => FoundTargetDirTransformFoundTargetDirAnnotation
}
state.copy(annotations = state.annotations ++ a ++ Some(FoundTargetDirTransformRanAnnotation))
}
}
class TargetDirAnnotationSpec extends FirrtlFlatSpec {
behavior.of("The target directory")
val input =
"""circuit Top :
| module Top :
| input foo : UInt<32>
| output bar : UInt<32>
| bar <= foo
""".stripMargin
val targetDir = "a/b/c"
it should "be available as an annotation when using execution options" in {
val findTargetDir = new FindTargetDirTransform // looks for the annotation
val annotations: Seq[Annotation] = (new FirrtlStage).execute(
Array("--target-dir", targetDir, "--compiler", "high"),
Seq(
FirrtlCircuitAnnotation(Parser.parse(input)),
RunFirrtlTransformAnnotation(findTargetDir)
)
)
annotations should contain(FoundTargetDirTransformRanAnnotation)
annotations should contain(FoundTargetDirTransformFoundTargetDirAnnotation)
// Delete created directory
val dir = new java.io.File(targetDir)
dir.exists should be(true)
FileUtils.deleteDirectoryHierarchy("a") should be(true)
}
it should "NOT be available as an annotation when using a raw compiler" in {
val findTargetDir = new FindTargetDirTransform // looks for the annotation
val compiler = new VerilogCompiler
val circuit = Parser.parse(input.split("\n"))
val annotations: Seq[Annotation] = compiler
.compileAndEmit(CircuitState(circuit, HighForm), Seq(findTargetDir))
.annotations
// Check that FindTargetDirTransform does not find the annotation
annotations should contain(FoundTargetDirTransformRanAnnotation)
annotations should not contain (FoundTargetDirTransformFoundTargetDirAnnotation)
}
}
|
