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2019-10-22Emit Verilog "else if" in register updatesSchuyler Eldridge
Modifies the Verilog emitter to emit "else if" blocks as opposed to more deeply nested "else begin if" blocks. This improves the output Verilog readability. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-10-21Add tests for memories with latency >1, toggling enablesAlbert Magyar
2019-10-21Add library for streamlined Verilog execution testsAlbert Magyar
2019-10-21Add test for #1179: comb-loops from VerilogMemDelaysAlbert Magyar
2019-10-21Fix write-first mem enable handling in VerilogMemDelaysAlbert Magyar
* Additional refactoring to clean up pass implementation * Make register names match old scheme to appease CI
2019-10-18Upstream intervals (#870)Adam Izraelevitz
Major features: - Added Interval type, as well as PrimOps asInterval, clip, wrap, and sqz. - Changed PrimOp names: bpset -> setp, bpshl -> incp, bpshr -> decp - Refactored width/bound inferencer into a separate constraint solver - Added transforms to infer, trim, and remove interval bounds - Tests for said features Plan to be released with 1.3
2019-10-08Add test for TopWiringTransform idempotencySchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-10-08Make TopWiringTransform idempotentSchuyler Eldridge
This changes TopWiringTransform to remove TopWiringAnnotations after it runs. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-10-07Absorb some instance analysis into InstanceGraph, use safer boxed Strings ↵Albert Magyar
(#1186) * Replace instance analysis code with InstanceGraph API calls * Add convenience implicits for using TargetTokens as safe boxed strings
2019-10-03Add Block factory from argument list of Statements (#1197)Albert Magyar
2019-10-01Restore ResolveGenders to its status as a Pass (#1192)Jack Koenig
Fix minor regression from #1124
2019-09-30Implement read-first memories in VerilogMemDelaysAlbert Magyar
* Corrects behavior under write collisions * Avoids heavily refactoring pass
2019-09-30Add read-under-write checks for memory emissionAlbert Magyar
* Stop ignoring read-under-write (RUW) parameter * Add conservative check: blackbox only when RUW is "undefined" * VerilogMemDelays now throws InternalError for read-first memories * Previously, read-first mems were incorrectly implemented as write-first
2019-09-30Improve read-under-write parameter supportAlbert Magyar
* Make the read-under-write (RUW) parameter typesafe * Add RUW support to the FIRRTL proto and CHIRRTL grammar
2019-09-19Faster inline renaming (#1184)Albert Chen
* dont chain inline and refix RenameMaps * cache already inlined modules * reduce number of chained RenameMaps * InlineInstances: cleanup and add comments
2019-09-17Speed up InlineInstances (#1182)Jack Koenig
Create instance maps once for each Module
2019-09-16Deprecate Gender and add implicit Flow conversionSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-09-16Rename gender to flowSchuyler Eldridge
The following names are changed: - gender -> flow - Gender -> Flow - MALE -> SourceFlow - FEMALE -> SinkFlow - BIGENDER -> DuplexFlow - UNKNOWNGENDER -> UnknownFlow Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-09-12Add space, s/Github/GitHub/ in DontTouchException (#1177)Schuyler Eldridge
Adds a space to correct in an exception message. Corrects capitalization in Github to it's official name (GitHub) and adds a link to file an issue. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-09-12update inline transform and testcasesAbert Chen
2019-09-06Refactor: remove redundancy code (#1166)Leway Colin
* Refactor: remove redundancy code * Fixed coding style
2019-09-05Filter out more filename extensions for blackbox source headers (#1134)Albert Magyar
2019-09-05clean up spacing in inline testabejgonzalez
2019-08-27Add StageErrorSchuyler Eldridge
This adds the StageError Error. This Error indicates that a Stage/Phase has hit an unrecoverable error, it cannot continue, and requests that the entire Stage/Phase hierarchy be killed with an ExitFailure ExitCode. StageMain is modified to catch StageError and exit the application with the provided exit code number. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-27Add firrtl.options.ExitCode type hierarchySchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-20Remove incorrect short option for --info-modeSchuyler Eldridge
This should be a helpValueName and not a shortOption. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-19Refactor exceptions to remove stack trace from user errors (#1157)Jack Koenig
2019-08-13Infer reset (#1068)Jack Koenig
* Add abstract "Reset" which can be inferred to AsyncReset or UInt<1> * Enhance async reset initial value literal check to support aggregates
2019-08-09Remove unused CheckHighFormLike.IllegalChirrtlMemException (#1151)Albert Magyar
2019-08-07Add tests on RemoveReset of invalid initsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-07Improve RemoveReset handling of invalid initsSchuyler Eldridge
This modifies RemoveReset to NOT generate a mux for invalid (IsInvalid) inits. In the case of an invalid init, the reset is converted to a self-connect and no mux is generated. This is implemented as a new, initial pass over the module to populate a set of all invalid signals. During the subsequent, circuit-modifying pass, this invalid set is queried to special case the handling of invalid inits. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-07Check mems for legal latencies; ban zero write latency. (#1147)Albert Magyar
* Check mems for legal latencies; ban zero write latency. * Trigger
2019-08-07DRY check chirrtl (#1148)Albert Magyar
* Avoid redundancy between CheckChirrtl and CheckHighForm, add more checks * Add test case for illegal Chirrtl memory in HighForm
2019-08-05Add FileUtilsSpecSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-05Iterate 1x in FileUtils.getText, DRY out getTextSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-08-01Followup to PR #1142chick
- use scala.io.Source instead of io.Source - .toList cleaner way to force stream to be read. - clear old commented out code in ProtoBufSpec
2019-08-01Followup to PR #1142chick
Fixes a threading bug in where lazy reading of file caused a problem for multithreaded access to the that was read. Changes all uses of io.Source to use new API getText getLines getTextResource getLinesResouce Make style to only import FileUtils and not its methods So code is more explicit as e.g. FileUtils.getText()
2019-07-31io.Source is not closed when used in most common text reading idiom (#1142)Chick Markley
- Provide new tools for reading in text - from a file - from a string file name - from a resource file - text can be read in as - a single string with newlines - a seq of strings, one string per line - FileUtils put in its own file - in same package to keep existing API the same Hopefully this will protect users from creating resource leaks that may explain sbt crashing. Also simpler interface should make code more streamlined, existing uses of io.Source seem often to be converting between text and seq unnecessarily. Add note of caution on requiring slash on resource readers
2019-07-30Fix "since" deprecation, should be "1.2" not "1.3" (#1139)Schuyler Eldridge
- Fixes BlackBoxSourceHelper deprecation "since"
2019-07-25Implement MultiTargetAnnotation (#1109)Sequencer
* add multi target annotation for advices * use Seq[Seq[Target]] store targets * add flat function * doc simplify
2019-07-25Allow name of blackbox resource .f file to change from static value (#1129)Albert Magyar
* Allow name of blackbox resource .f file to change from static value * Restore fileListName as a deprecated def per Jack's feedback * Support both local and absolute paths for .f resource files
2019-07-24Add ExpandConnects to TopWiringTransform fixup (#1135)Schuyler Eldridge
This fixes a bug in the TopWiringTransform when wiring aggregates by adding ExpandConnects to its list of fixup passes. TopWiringTransform is MidForm => MidForm, but when wiring aggregates, it will output bulk connects. This violates the MidForm prerequisite that ExpandConnects has run. Symptomatically, this will manifest as match errors in LowerTypes if a user tries to use the TopWiringTransform on aggregates. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-07-23more constprop on muxes (#1052)Donggyu Kim
2019-07-21Fix RenameMap chaining (#1126)Albert Chen
* fix RenameMap chaining * fix order of chaining, add another test case
2019-07-19Add SimplifyMems transform to lower memories without splitting (#1111)Albert Magyar
* Add SimplifyMems transform to lower memories without splitting * Remove spurious anonymous function
2019-07-19Fix renaming of annotations with paths (#967)Albert Chen
* check isLocal before removing target tokens in RenameMap * add fix for Adam's test case, add more test cases * fix multiple renaming bug * call componentGet before checking underlying for ReferenceTargets in recursiveGet * add ModuleGet that implements new instance rename order * normalize target before renaming * fix forall/exists bug * add guards for isLocal cases * fix circuit renaming, fix traverseHierarchy, add debug prints * remove sensitivity stuff * add more tests * reapply parent path to renamed subpath, fix reference -> instance renames * remove debug prints * add instance as reference test case * fix Ref->IsMod, IsMod->Ref renamed, fix extra test cases * fix ofModule renaming for refs/instances * fix renaming of ofModules, change tests * fix more InstanceTarget rename bugs * remove bad ReferenceTarget test case * cleanup midRename of recursiveGet * fix comments * fix multiple ModuleTarget renames for InstanceTargets * dis-allow renaming of ModuleTargets to References * add back removed lines in RemoveCHIRRTL * fix indents * only add ofModule to refs if renaming an inst as a ref * change .moduleOpt.get to .module * disallow renaming ReferenceTarget->ModuleTarget * disallow ref->mod renames in tests, add inst as ref test cases * cache results of get functions * fix bot/mid/top renames, add andThen * fix andThen, add test case * add more test cases, fix ++ * fix comments, make things private * dont quit if earlier returns None, add dedup/inline rename tests * don't rename OfModules to instances paths * update dedup test * don't treat references as instances, don't reapply parents to absolute paths * fix more test cases * short-circuit OfModule renames if an absolute path is found * update andThen, remove orElse, deprecate ++ * removed commented code * update comments * respond to comments
2019-07-15Add type aliases for dependenciesSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-07-11Change Dependency API to Class[_ <: A]Schuyler Eldridge
This changes the Dependency API to specify dependencies in terms of classes subtyping the DependencyAPI trait. Previously, this was invariant which caused a bunch of ugly, unneeded .asInstanceOf jank. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-07-08Fix typo (#1114)Leway Colin
2019-07-08Remove some warnings (#1118)Leway Colin
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