| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-03-03 | Add some integration tests: successful compilation and execution | jackkoenig |
| 2016-02-25 | Remove brittle rocket comparison to expected verilog test. | jackkoenig |
| 2016-02-24 | Make rocket.fir regression test fail nicer on console | jackkoenig |
| 2016-02-23 | Add rocket regression, just runs rocket.fir through Verilog compiler and comp... | Jack |
| 2015-02-18 | Added more testing infrastructre, and Makefile to build firrtl | azidar |
| 2015-02-18 | Reimplemented to-working-ir. Changed Command to Stmt. Modified printing of IR... | azidar |
| 2015-02-13 | First commit. | azidar |
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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