aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-02-19Add dependency prettyPrint, visualization updatesSchuyler Eldridge
This adds a prettyPrint method to the DependencyManager to enable textual visualization of the TransformLikes that a DependencyManager determines need to be run. This also cleans up the GraphViz visualization with better edge coloring and now uses the `name` method when labeling graphviz nodes. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-19Make PreservesAll invalidates finalSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-19Add additional PhaseManager testsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-19Support Singleton Dependencies (#1275)Albert Magyar
This makes a change to the Dependency API that breaks chisel3. This needs to [skip chisel tests], but is fixed with https://github.com/freechipsproject/chisel3/pull/1270. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-18Merge pull request #1401 from freechipsproject/reachable-from-specAlbert Magyar
Add more docs / tests for DiGraph reachableFrom method
2020-02-18Add test case for reachableFrom behavior w.r.t. including rootAlbert Magyar
2020-02-18Update reachableFrom ScalaDocAlbert Magyar
2020-02-18Revert "Repl seq mem renaming (#1286)" (#1399)Jack Koenig
This reverts commit eabc38559b7634ff7147aa0ab3d71e78558d5162.
2020-02-18Remove last connect semantics from reset inference (#1396)Jack Koenig
* Revert "Infer resets last connect semantics (#1291)" * Fix handling of invalidated and undriven components of type Reset * Run CheckTypes after InferResets * Make reset inference bidirectional on connect * Support AsyncResetType in RemoveValidIf * Fix InferResets for parent constraints on child ports * Apply suggestions from code review * Add ScalaDoc to InferResets Co-authored-by: Albert Magyar <albert.magyar@gmail.com> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>
2020-02-13Mill support (#1368)Sequencer
2020-02-13Update ScalaTest deprecations. (#1382)Jim Lawson
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-13Merge pull request #1361 from freechipsproject/const-prop-eqAlbert Magyar
Constant prop binary PrimOps with matching arguments
2020-02-13Add Ops equiv check to stress degenerate binary op ConstPropAlbert Magyar
* Send in the Yosys
2020-02-13Constant prop binary PrimOps with matching argumentsAlbert Magyar
* Add SimplifyBinaryOp trait * Add extra functionality to comparison folding * Add tests * Fix comments from review
2020-02-13Merge pull request #1391 from freechipsproject/instance-graph-helpersSchuyler Eldridge
Add InstaceGraph (Un)?Reachable Helpers
2020-02-13Add tests for (Un)?reachable InstanceGraph MethodsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-13Add InstanceGraph helpers: reachable/unreachableSchuyler Eldridge
Adds new APIs for querying sets of modules in an InstanceGraph: - modules: the set of all modules - reachableModules: set of modules reachable from the main/top - unreachableModules: set of modules not reachable from the main/top Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-12Merge pull request #1388 from freechipsproject/allow-self-renamesSchuyler Eldridge
Allow self renames
2020-02-12Add test of RenameMap not recording same renameSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-12Add test of RenameMap self-renamingSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-12Update RenameMap Scaladoc for self-rename, distincSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-12Record self-renames in RenameMap, distinct renamesSchuyler Eldridge
Change the behavior of RenameMap.completeTarget so that self-renames do not silently *not* happen. Previously, requests to self-rename would be ignored unless they were packaged in a sequences of renames that included a self-rename. Change renames to be recorded distinctly so that multiple requests to rename to the same thing will now deduplicate. Previously, these renames would be recorded multiple times. This change was required because allowing self-renames exposed a bug in InferWidthsAnnosSpec due to multiple renames. These changes benefit the situation where you rightly want to do a self-rename. Namely, when doing module duplication (with the EliminateTargetPaths transform). Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Do not record the same rename multiple times Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-12Repl seq mem renaming (#1286)Jack Koenig
* Consume NoDedupMemAnnotations in ResolveMemoryReference The ComponentName being pointed to by the annotation no longer exists after ReplaceSeqMems so we should consume the annotations * Support renaming in ReplaceMemMacros Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Update sbt-unidoc to 0.4.3 (#1345)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-02-12Update sbt-antlr4 to 0.8.2 (#1331)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-02-11Merge pull request #1387 from ↵Schuyler Eldridge
freechipsproject/InstanceGraph.staticInstanceCount-fix Include Dead Modules in InstanceGraph.staticInstanceCount
2020-02-11Add InstanceGraph.staticInstanceCount testsSchuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-11Report dead modules in staticInstanceCountSchuyler Eldridge
Change InstanceGraph.staticInstanceCount to include modules with no instances. Previously, these modules would just not be included. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-12Removed unused imports in src/test/ (#1381)Jim Lawson
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Update sbt to 1.3.8 (#1354)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Fixing lint error: x + -1 (#1374)Adam Izraelevitz
* Generates lint-clean Verilog for the case: x + -1 ...where x is anything and 1 is any literal. Master behavior: input x : SInt<8> output z : SInt<9> z <= add(x, SInt(-2)) generates assign z = $signed(x) + -8'sh2; After this PR: assign z = $signed(x) - 8'sh2; If the literal is the maximum possible literal, a special case is triggered to properly trim the resulting subtraction. Input: input x : SInt<2> output z : SInt<3> z <= add(x, SInt(-2)) now generates (after this PR) assign z = $signed(x) - 3'sh2; * Updated documentation * Change ArrayBuffer to ListBuffer * Change name to minNegValue * Remove mutable public interfaces Co-authored-by: Albert Magyar <albert.magyar@gmail.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Update scalacheck to 1.14.3 (#1336)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Update sbt-scoverage to 1.6.1 (#1335)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Support MemConfs with very deep memories (#1367)Jerry Zhao
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Add reviewer checklist / update contributor checklist (#1375)Adam Izraelevitz
* Add reviewer checklist / update contributor checklist * Update PULL_REQUEST_TEMPLATE.md Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-12Update commons-text to 1.8 (#1333)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-11Update junit to 4.13 (#1332)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-11Update protoc-jar to 3.11.1 (#1330)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-11Update sbt-unidoc to 0.4.2 (#1329)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-11Update sbt-buildinfo to 0.9.0 (#1328)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2020-02-11Update sbt-assembly to 0.14.10 (#1327)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-02-11Update sbt-scalafix to 0.9.11 (#1326)Scala Steward
Co-authored-by: Jim Lawson <ucbjrl@berkeley.edu>
2020-02-11[spec] Change sub(UInt, UInt) output type to UInt (#1378)Albert Magyar
2020-02-10Merge pull request #1370 from freechipsproject/issue-1309Schuyler Eldridge
Rename Modules Duplicated by EliminateTargetPaths
2020-02-10Test EliminateTargetPaths ModuleTarget anno dupingSchuyler Eldridge
Add a test that EliminateTargetPaths properly duplicates an annotation pointing at a ModuleTarget. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-10Rename modules when duplicating instancesSchuyler Eldridge
Change the behavior of EliminateTargetPaths to generate ModuleTarget renames when instances are duplicated. Previously, only InstanceTarget renames would be generated. In effect, annotations targeting a duplicated module when be duplicated to point at the original and duplicated module. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-10Add Target utility referringModuleSchuyler Eldridge
This adds a utility method, referringModule, to the Target object that behaves like IsMember.pathlessTarget except that it returns the module of an InstanceTarget. This is useful for situations where you want to get at "the module" a target is pointing at, but you want behavior to get an actual module from an instance. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2020-02-07Merge pull request #1366 from freechipsproject/dueling-const-propAlbert Magyar
Better register const prop through speculative de-optimization
2020-02-07Add extra 'de-optimization' opportunity for register const prop testAlbert Magyar
2020-02-07Refactor handling of reg const prop entries to cover more casesAlbert Magyar
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-25 18:01:57 +0000