diff options
Diffstat (limited to 'test/passes/resolve-genders/ports.fir')
| -rw-r--r-- | test/passes/resolve-genders/ports.fir | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/passes/resolve-genders/ports.fir b/test/passes/resolve-genders/ports.fir index 57c8721d..246fb9ac 100644 --- a/test/passes/resolve-genders/ports.fir +++ b/test/passes/resolve-genders/ports.fir @@ -11,11 +11,11 @@ circuit top : output ready : UInt<1> module top: wire connect : { data : UInt<16>, flip ready: UInt<1> } - inst src of source ;CHECK: inst src of source@<g:m> - inst snk of sink ;CHECK: inst snk of sink@<g:m> - connect.data <= src.data ;CHECK: connect@<g:f>.data@<g:f> := src@<g:m>.data@<g:m> - src.ready <= connect.ready ;CHECK: src@<g:m>.ready@<g:f> := connect@<g:f>.ready@<g:m> - snk.data <= connect.data ;CHECK: snk@<g:m>.data@<g:f> := connect@<g:m>.data@<g:m> - connect.ready <= snk.ready ;CHECK: connect@<g:m>.ready@<g:f> := snk@<g:m>.ready@<g:m> + inst src of source + inst snk of sink + connect.data <= src.data ;CHECK: connect@<g:f>.data@<g:f> <= src@<g:m>.data@<g:m> + src.ready <= connect.ready ;CHECK: src@<g:m>.ready@<g:f> <= connect@<g:f>.ready@<g:m> + snk.data <= connect.data ;CHECK: snk@<g:m>.data@<g:f> <= connect@<g:m>.data@<g:m> + connect.ready <= snk.ready ;CHECK: connect@<g:m>.ready@<g:f> <= snk@<g:m>.ready@<g:m> ; CHECK: Finished Resolve Genders |