diff options
Diffstat (limited to 'test/passes/jacktest/ModuleVec.fir')
| -rw-r--r-- | test/passes/jacktest/ModuleVec.fir | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/passes/jacktest/ModuleVec.fir b/test/passes/jacktest/ModuleVec.fir index 8ac27aaf..9a8e7f2c 100644 --- a/test/passes/jacktest/ModuleVec.fir +++ b/test/passes/jacktest/ModuleVec.fir @@ -6,13 +6,13 @@ circuit ModuleVec : output out : UInt<32> node T_33 = addw(in, UInt<1>(1)) - out := T_33 + out <= T_33 module PlusOne_25 : input in : UInt<32> output out : UInt<32> node T_34 = addw(in, UInt<1>(1)) - out := T_34 + out <= T_34 module ModuleVec : input ins : UInt<32>[2] output outs : UInt<32>[2] @@ -20,9 +20,9 @@ circuit ModuleVec : inst T_35 of PlusOne inst T_36 of PlusOne_25 wire pluses : {flip in : UInt<32>, out : UInt<32>}[2] - pluses[0] := T_35 - pluses[1] := T_36 - pluses[0].in := ins[0] - outs[0] := pluses[0].out - pluses[1].in := ins[1] - outs[1] := pluses[1].out + pluses[0] <= T_35 + pluses[1] <= T_36 + pluses[0].in <= ins[0] + outs[0] <= pluses[0].out + pluses[1].in <= ins[1] + outs[1] <= pluses[1].out |