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+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+;CHECK: Done!
+
+circuit Counter :
+ module Counter :
+ input inc : UInt<1>
+ output tot : UInt<8>
+ input amt : UInt<4>
+
+ reg T_13 : UInt<8>
+ on-reset T_13 := UInt<8>(0)
+ when inc :
+ node T_14 = add-wrap(T_13, amt)
+ node T_15 = gt(T_14, UInt<8>(255))
+ node T_16 = mux(T_15, UInt<1>(0), T_14)
+ T_13 := T_16
+ tot := T_13