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-rw-r--r--src/main/scala/firrtl/passes/UpdateDuplicateMemMacros.scala6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/UpdateDuplicateMemMacros.scala b/src/main/scala/firrtl/passes/UpdateDuplicateMemMacros.scala
index fbff9bd6..5b420591 100644
--- a/src/main/scala/firrtl/passes/UpdateDuplicateMemMacros.scala
+++ b/src/main/scala/firrtl/passes/UpdateDuplicateMemMacros.scala
@@ -87,9 +87,9 @@ object MemTransformUtils {
}
def createMemProto(m: DefMemory) = {
- val rports = (0 until m.readers.length) map (i => s"R$i")
- val wports = (0 until m.writers.length) map (i => s"W$i")
- val rwports = (0 until m.readwriters.length) map (i => s"RW$i")
+ val rports = m.readers.indices map (i => s"R$i")
+ val wports = m.writers.indices map (i => s"W$i")
+ val rwports = m.readwriters.indices map (i => s"RW$i")
m copy (readers = rports, writers = wports, readwriters = rwports)
}