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-rw-r--r--src/main/scala/firrtl/Compiler.scala4
-rw-r--r--src/main/scala/firrtl/Driver.scala2
-rw-r--r--src/main/scala/firrtl/Emitter.scala18
-rw-r--r--src/main/scala/firrtl/Utils.scala17
-rw-r--r--src/main/scala/firrtl/Visitor.scala2
-rw-r--r--src/main/scala/firrtl/analyses/InstanceGraph.scala4
-rw-r--r--src/main/scala/firrtl/passes/CheckWidths.scala2
-rw-r--r--src/main/scala/firrtl/passes/Checks.scala2
-rw-r--r--src/main/scala/firrtl/passes/ConvertFixedToSInt.scala4
-rw-r--r--src/main/scala/firrtl/passes/InferWidths.scala2
-rw-r--r--src/main/scala/firrtl/passes/RemoveAccesses.scala2
-rw-r--r--src/main/scala/firrtl/passes/Resolves.scala8
-rw-r--r--src/main/scala/firrtl/passes/Uniquify.scala2
-rw-r--r--src/main/scala/firrtl/passes/ZeroWidth.scala1
-rw-r--r--src/main/scala/firrtl/passes/clocklist/ClockList.scala2
-rw-r--r--src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala2
-rw-r--r--src/main/scala/firrtl/transforms/CheckCombLoops.scala4
-rw-r--r--src/main/scala/firrtl/transforms/FlattenRegUpdate.scala2
-rw-r--r--src/main/scala/firrtl/transforms/GroupComponents.scala2
19 files changed, 39 insertions, 43 deletions
diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala
index d43f415a..ca74e5e1 100644
--- a/src/main/scala/firrtl/Compiler.scala
+++ b/src/main/scala/firrtl/Compiler.scala
@@ -330,8 +330,8 @@ object CompilerUtils extends LazyLogging {
Seq(new IRToWorkingIR, new ResolveAndCheck, new transforms.DedupModules,
new HighFirrtlToMiddleFirrtl) ++ getLoweringTransforms(MidForm, outputForm)
case MidForm => Seq(new MiddleFirrtlToLowFirrtl) ++ getLoweringTransforms(LowForm, outputForm)
- case LowForm => throwInternalError(Some("getLoweringTransforms - LowForm")) // should be caught by if above
- case UnknownForm => throwInternalError(Some("getLoweringTransforms - UnknownForm")) // should be caught by if above
+ case LowForm => throwInternalError("getLoweringTransforms - LowForm") // should be caught by if above
+ case UnknownForm => throwInternalError("getLoweringTransforms - UnknownForm") // should be caught by if above
}
}
}
diff --git a/src/main/scala/firrtl/Driver.scala b/src/main/scala/firrtl/Driver.scala
index f9ba6141..7d8686ba 100644
--- a/src/main/scala/firrtl/Driver.scala
+++ b/src/main/scala/firrtl/Driver.scala
@@ -269,7 +269,7 @@ object Driver {
optionsManager.showUsageAsError()
failure
case result =>
- throwInternalError(Some(s"Error: Unknown Firrtl Execution result $result"))
+ throwInternalError(s"Error: Unknown Firrtl Execution result $result")
}
}
else {
diff --git a/src/main/scala/firrtl/Emitter.scala b/src/main/scala/firrtl/Emitter.scala
index 2c874392..195f786d 100644
--- a/src/main/scala/firrtl/Emitter.scala
+++ b/src/main/scala/firrtl/Emitter.scala
@@ -76,7 +76,7 @@ sealed abstract class FirrtlEmitter(form: CircuitForm) extends Transform with Em
case WDefInstance(_, _, name, _) =>
modules += map(name)
stmt
- case _: WDefInstanceConnector => throwInternalError(Some(s"unrecognized statement: $stmt"))
+ case _: WDefInstanceConnector => throwInternalError(s"unrecognized statement: $stmt")
case other => other map onStmt
}
onStmt(mod.body)
@@ -143,7 +143,7 @@ class VerilogEmitter extends SeqTransform with Emitter {
case (e: WSubField) => remove_root(e)
case (_: WRef) => WRef(ex.name, ex.tpe, InstanceKind, UNKNOWNGENDER)
}
- case _ => throwInternalError(Some(s"shouldn't be here: remove_root($ex)"))
+ case _ => throwInternalError(s"shouldn't be here: remove_root($ex)")
}
/** Turn Params into Verilog Strings */
def stringify(param: Param): String = param match {
@@ -157,7 +157,7 @@ class VerilogEmitter extends SeqTransform with Emitter {
val wx = bitWidth(tpe) - 1
if (wx > 0) s"[$wx:0]" else ""
case ClockType => ""
- case _ => throwInternalError(Some(s"trying to write unsupported type in the Verilog Emitter: $tpe"))
+ case _ => throwInternalError(s"trying to write unsupported type in the Verilog Emitter: $tpe")
}
def emit(x: Any)(implicit w: Writer) { emit(x, 0) }
def emit(x: Any, top: Int)(implicit w: Writer) {
@@ -166,7 +166,7 @@ class VerilogEmitter extends SeqTransform with Emitter {
case (t: SIntType) => Seq("$signed(",e,")")
case ClockType => e
case AnalogType(_) => e
- case _ => throwInternalError(Some(s"unrecognized cast: $e"))
+ case _ => throwInternalError(s"unrecognized cast: $e")
}
x match {
case (e: DoPrim) => emit(op_stream(e), top + 1)
@@ -196,7 +196,7 @@ class VerilogEmitter extends SeqTransform with Emitter {
case (s: Seq[Any]) =>
s foreach (emit(_, top + 1))
if (top == 0) w write "\n"
- case x => throwInternalError(Some(s"trying to emit unsupported operator: $x"))
+ case x => throwInternalError(s"trying to emit unsupported operator: $x")
}
}
@@ -210,7 +210,7 @@ class VerilogEmitter extends SeqTransform with Emitter {
case '-' => s"-$width'sh${stringLiteral.tail}"
case _ => s"$width'sh${stringLiteral}"
})
- case _ => throwInternalError(Some(s"attempt to print unrecognized expression: $e"))
+ case _ => throwInternalError(s"attempt to print unrecognized expression: $e")
}
def op_stream(doprim: DoPrim): Seq[Any] = {
@@ -223,19 +223,19 @@ class VerilogEmitter extends SeqTransform with Emitter {
case Some(_) => e.tpe match {
case (_: SIntType) => Seq("$signed(", e, ")")
case (_: UIntType) => Seq("$signed({1'b0,", e, "})")
- case _ => throwInternalError(Some(s"unrecognized type: $e"))
+ case _ => throwInternalError(s"unrecognized type: $e")
}
}
}
def cast(e: Expression): Any = doprim.tpe match {
case (t: UIntType) => e
case (t: SIntType) => Seq("$signed(",e,")")
- case _ => throwInternalError(Some(s"cast - unrecognized type: $e"))
+ case _ => throwInternalError(s"cast - unrecognized type: $e")
}
def cast_as(e: Expression): Any = e.tpe match {
case (t: UIntType) => e
case (t: SIntType) => Seq("$signed(",e,")")
- case _ => throwInternalError(Some(s"cast_as - unrecognized type: $e"))
+ case _ => throwInternalError(s"cast_as - unrecognized type: $e")
}
def a0: Expression = doprim.args.head
def a1: Expression = doprim.args(1)
diff --git a/src/main/scala/firrtl/Utils.scala b/src/main/scala/firrtl/Utils.scala
index 0c684c5d..61078387 100644
--- a/src/main/scala/firrtl/Utils.scala
+++ b/src/main/scala/firrtl/Utils.scala
@@ -169,14 +169,11 @@ object Utils extends LazyLogging {
* @param message - possible string to emit,
* @param exception - possible exception triggering the error.
*/
- def throwInternalError(message: Option[String] = None, exception: Option[Exception] = None) = {
+ def throwInternalError(message: String = "", exception: Option[Exception] = None) = {
// We'll get the first exception in the chain, keeping it intact.
val first = true
val throwable = getThrowable(exception, true)
- val string: String = message match {
- case Some(s: String) => s + "\n"
- case _ => ""
- }
+ val string = if (message.nonEmpty) message + "\n" else message
error("Internal Error! %sPlease file an issue at https://github.com/ucb-bar/firrtl/issues".format(string), throwable)
}
@@ -263,7 +260,7 @@ object Utils extends LazyLogging {
}
}
def get_flip(t: Type, i: Int, f: Orientation): Orientation = {
- if (i >= get_size(t)) throwInternalError(Some(s"get_flip: shouldn't be here - $i >= get_size($t)"))
+ if (i >= get_size(t)) throwInternalError(s"get_flip: shouldn't be here - $i >= get_size($t)")
t match {
case (_: GroundType) => f
case (tx: BundleType) =>
@@ -436,7 +433,7 @@ object Utils extends LazyLogging {
ilen + get_size(t1x.tpe), jlen + get_size(t2x.tpe))
}._1
case (ClockType, ClockType) => if (flip1 == flip2) Seq((0, 0)) else Nil
- case _ => throwInternalError(Some(s"get_valid_points: shouldn't be here - ($t1, $t2)"))
+ case _ => throwInternalError(s"get_valid_points: shouldn't be here - ($t1, $t2)")
}
}
@@ -482,9 +479,9 @@ object Utils extends LazyLogging {
def get_field(v: Type, s: String): Field = v match {
case vx: BundleType => vx.fields find (_.name == s) match {
case Some(ft) => ft
- case None => throwInternalError(Some(s"get_field: shouldn't be here - $v.$s"))
+ case None => throwInternalError(s"get_field: shouldn't be here - $v.$s")
}
- case vx => throwInternalError(Some(s"get_field: shouldn't be here - $v"))
+ case vx => throwInternalError(s"get_field: shouldn't be here - $v")
}
def times(flip: Orientation, d: Direction): Direction = times(flip, d)
@@ -527,7 +524,7 @@ object Utils extends LazyLogging {
case ex: Mux => MALE
case ex: ValidIf => MALE
case WInvalid => MALE
- case ex => throwInternalError(Some(s"gender: shouldn't be here - $e"))
+ case ex => throwInternalError(s"gender: shouldn't be here - $e")
}
def get_gender(s: Statement): Gender = s match {
case sx: DefWire => BIGENDER
diff --git a/src/main/scala/firrtl/Visitor.scala b/src/main/scala/firrtl/Visitor.scala
index d0173774..c45d7f56 100644
--- a/src/main/scala/firrtl/Visitor.scala
+++ b/src/main/scala/firrtl/Visitor.scala
@@ -93,7 +93,7 @@ class Visitor(infoMode: InfoMode) extends FIRRTLBaseVisitor[FirrtlNode] {
case (null, str, null, null) => StringParam(name, visitStringLit(str))
case (null, null, dbl, null) => DoubleParam(name, dbl.getText.toDouble)
case (null, null, null, raw) => RawStringParam(name, raw.getText.tail.init) // Remove "\'"s
- case _ => throwInternalError(Some(s"visiting impossible parameter ${ctx.getText}"))
+ case _ => throwInternalError(s"visiting impossible parameter ${ctx.getText}")
}
}
diff --git a/src/main/scala/firrtl/analyses/InstanceGraph.scala b/src/main/scala/firrtl/analyses/InstanceGraph.scala
index 29942cd5..c6e590af 100644
--- a/src/main/scala/firrtl/analyses/InstanceGraph.scala
+++ b/src/main/scala/firrtl/analyses/InstanceGraph.scala
@@ -108,8 +108,8 @@ object InstanceGraph {
case i: WDefInstance =>
insts += i
i
- case i: DefInstance => throwInternalError(Some("Expecting WDefInstance, found a DefInstance!"))
- case i: WDefInstanceConnector => throwInternalError(Some("Expecting WDefInstance, found a WDefInstanceConnector!"))
+ case i: DefInstance => throwInternalError("Expecting WDefInstance, found a DefInstance!")
+ case i: WDefInstanceConnector => throwInternalError("Expecting WDefInstance, found a WDefInstanceConnector!")
case _ => s map collectInstances(insts)
}
}
diff --git a/src/main/scala/firrtl/passes/CheckWidths.scala b/src/main/scala/firrtl/passes/CheckWidths.scala
index 7406f09a..7827c55e 100644
--- a/src/main/scala/firrtl/passes/CheckWidths.scala
+++ b/src/main/scala/firrtl/passes/CheckWidths.scala
@@ -50,7 +50,7 @@ object CheckWidths extends Pass {
def hasWidth(tpe: Type): Boolean = tpe match {
case GroundType(IntWidth(w)) => true
case GroundType(_) => false
- case _ => throwInternalError(Some(s"hasWidth - $tpe"))
+ case _ => throwInternalError(s"hasWidth - $tpe")
}
def check_width_t(info: Info, mname: String)(t: Type): Type =
diff --git a/src/main/scala/firrtl/passes/Checks.scala b/src/main/scala/firrtl/passes/Checks.scala
index 2946127a..215c5425 100644
--- a/src/main/scala/firrtl/passes/Checks.scala
+++ b/src/main/scala/firrtl/passes/Checks.scala
@@ -305,7 +305,7 @@ object CheckTypes extends Pass {
case UnknownType =>
errors.append(new IllegalUnknownType(info, mname, e.serialize))
(isUInt, isSInt, isClock, isFix)
- case other => throwInternalError(Some(s"Illegal Type: ${other.serialize}"))
+ case other => throwInternalError(s"Illegal Type: ${other.serialize}")
}
} match {
// (UInt, SInt, Clock, Fixed)
diff --git a/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala b/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala
index b52dacb7..4004b8d6 100644
--- a/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala
+++ b/src/main/scala/firrtl/passes/ConvertFixedToSInt.scala
@@ -19,7 +19,7 @@ object ConvertFixedToSInt extends Pass {
} else if (point - p < 0) {
DoPrim(Shr, Seq(e), Seq(p - point), UnknownType)
} else e
- case FixedType(w, p) => throwInternalError(Some(s"alignArg: shouldn't be here - $e"))
+ case FixedType(w, p) => throwInternalError(s"alignArg: shouldn't be here - $e")
case _ => e
}
def calcPoint(es: Seq[Expression]): BigInt =
@@ -29,7 +29,7 @@ object ConvertFixedToSInt extends Pass {
}).reduce(max(_, _))
def toSIntType(t: Type): Type = t match {
case FixedType(IntWidth(w), IntWidth(p)) => SIntType(IntWidth(w))
- case FixedType(w, p) => throwInternalError(Some(s"toSIntType: shouldn't be here - $t"))
+ case FixedType(w, p) => throwInternalError(s"toSIntType: shouldn't be here - $t")
case _ => t map toSIntType
}
def run(c: Circuit): Circuit = {
diff --git a/src/main/scala/firrtl/passes/InferWidths.scala b/src/main/scala/firrtl/passes/InferWidths.scala
index aacd3656..9ccd8c78 100644
--- a/src/main/scala/firrtl/passes/InferWidths.scala
+++ b/src/main/scala/firrtl/passes/InferWidths.scala
@@ -333,7 +333,7 @@ object InferWidths extends Pass {
case wx: MinusWidth => map2(solve(wx.arg1), solve(wx.arg2), {_ - _})
case wx: ExpWidth => map2(Some(BigInt(2)), solve(wx.arg1), pow_minus_one)
case wx: IntWidth => Some(wx.width)
- case wx => throwInternalError(Some(s"solve: shouldn't be here - %$wx")); None;
+ case wx => throwInternalError(s"solve: shouldn't be here - %$wx")
}
solve(w) match {
diff --git a/src/main/scala/firrtl/passes/RemoveAccesses.scala b/src/main/scala/firrtl/passes/RemoveAccesses.scala
index 9b19b221..30aae284 100644
--- a/src/main/scala/firrtl/passes/RemoveAccesses.scala
+++ b/src/main/scala/firrtl/passes/RemoveAccesses.scala
@@ -95,7 +95,7 @@ object RemoveAccesses extends Pass {
case (_:WSubAccess| _: WSubField| _: WSubIndex| _: WRef) if hasAccess(e) =>
val rs = getLocations(e)
rs find (x => x.guard != one) match {
- case None => throwInternalError(Some(s"removeMale: shouldn't be here - $e"))
+ case None => throwInternalError(s"removeMale: shouldn't be here - $e")
case Some(_) =>
val (wire, temp) = create_temp(e)
val temps = create_exps(temp)
diff --git a/src/main/scala/firrtl/passes/Resolves.scala b/src/main/scala/firrtl/passes/Resolves.scala
index b601c81e..e4a06525 100644
--- a/src/main/scala/firrtl/passes/Resolves.scala
+++ b/src/main/scala/firrtl/passes/Resolves.scala
@@ -85,19 +85,19 @@ object CInferMDir extends Pass {
mports get e.name match {
case None =>
case Some(p) => mports(e.name) = (p, dir) match {
- case (MInfer, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MInfer, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MInfer, MWrite) => MWrite
case (MInfer, MRead) => MRead
case (MInfer, MReadWrite) => MReadWrite
- case (MWrite, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MWrite, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MWrite, MWrite) => MWrite
case (MWrite, MRead) => MReadWrite
case (MWrite, MReadWrite) => MReadWrite
- case (MRead, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MRead, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MRead, MWrite) => MReadWrite
case (MRead, MRead) => MRead
case (MRead, MReadWrite) => MReadWrite
- case (MReadWrite, MInfer) => throwInternalError(Some(s"infer_mdir_e: shouldn't be here - $p, $dir"))
+ case (MReadWrite, MInfer) => throwInternalError(s"infer_mdir_e: shouldn't be here - $p, $dir")
case (MReadWrite, MWrite) => MReadWrite
case (MReadWrite, MRead) => MReadWrite
case (MReadWrite, MReadWrite) => MReadWrite
diff --git a/src/main/scala/firrtl/passes/Uniquify.scala b/src/main/scala/firrtl/passes/Uniquify.scala
index 661dbf4e..79954254 100644
--- a/src/main/scala/firrtl/passes/Uniquify.scala
+++ b/src/main/scala/firrtl/passes/Uniquify.scala
@@ -109,7 +109,7 @@ object Uniquify extends Transform {
}
recUniquifyNames(t, namespace) match {
case tx: BundleType => tx
- case tx => throwInternalError(Some(s"uniquifyNames: shouldn't be here - $tx"))
+ case tx => throwInternalError(s"uniquifyNames: shouldn't be here - $tx")
}
}
diff --git a/src/main/scala/firrtl/passes/ZeroWidth.scala b/src/main/scala/firrtl/passes/ZeroWidth.scala
index 32b0b833..5b61c373 100644
--- a/src/main/scala/firrtl/passes/ZeroWidth.scala
+++ b/src/main/scala/firrtl/passes/ZeroWidth.scala
@@ -7,7 +7,6 @@ import firrtl.PrimOps._
import firrtl.ir._
import firrtl._
import firrtl.Mappers._
-import firrtl.Utils.throwInternalError
object ZeroWidth extends Transform {
diff --git a/src/main/scala/firrtl/passes/clocklist/ClockList.scala b/src/main/scala/firrtl/passes/clocklist/ClockList.scala
index fcc3cd5e..43583726 100644
--- a/src/main/scala/firrtl/passes/clocklist/ClockList.scala
+++ b/src/main/scala/firrtl/passes/clocklist/ClockList.scala
@@ -44,7 +44,7 @@ class ClockList(top: String, writer: Writer) extends Pass {
val modulesToInline = (c.modules.collect { case Module(_, n, _, _) if n != top => ModuleName(n, CircuitName(c.main)) }).toSet
val inlineTransform = new InlineInstances
val inlinedCircuit = inlineTransform.run(onlyClockCircuit, modulesToInline, Set(), Seq()).circuit
- val topModule = inlinedCircuit.modules.find(_.name == top).getOrElse(throwInternalError(Some("no top module")))
+ val topModule = inlinedCircuit.modules.find(_.name == top).getOrElse(throwInternalError("no top module"))
// Build a hashmap of connections to use for getOrigins
val connects = getConnects(topModule)
diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
index 5ac9e63e..42b7fb21 100644
--- a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
+++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
@@ -214,7 +214,7 @@ class ReplaceMemMacros(writer: ConfWriter) extends Transform {
val pins = pannos match {
case Seq() => Nil
case Seq(PinAnnotation(pins)) => pins
- case _ => throwInternalError(Some(s"execute: getMyAnnotations - ${getMyAnnotations(state)}"))
+ case _ => throwInternalError(s"execute: getMyAnnotations - ${getMyAnnotations(state)}")
}
val annos = pins.foldLeft(Seq[Annotation]()) { (seq, pin) =>
seq ++ memMods.collect {
diff --git a/src/main/scala/firrtl/transforms/CheckCombLoops.scala b/src/main/scala/firrtl/transforms/CheckCombLoops.scala
index 6bd62cfa..a4dad11b 100644
--- a/src/main/scala/firrtl/transforms/CheckCombLoops.scala
+++ b/src/main/scala/firrtl/transforms/CheckCombLoops.scala
@@ -63,9 +63,9 @@ class CheckCombLoops extends Transform {
memport.expr match {
case memref: WRef =>
LogicNode(s.name,Some(memref.name),Some(memport.name))
- case _ => throwInternalError(Some(s"toLogicNode: unrecognized subsubfield expression - $memport"))
+ case _ => throwInternalError(s"toLogicNode: unrecognized subsubfield expression - $memport")
}
- case _ => throwInternalError(Some(s"toLogicNode: unrecognized subfield expression - $s"))
+ case _ => throwInternalError(s"toLogicNode: unrecognized subfield expression - $s")
}
}
diff --git a/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala b/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
index 07cb9cb5..f21e6b18 100644
--- a/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
+++ b/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
@@ -29,7 +29,7 @@ object FlattenRegUpdate {
netlist(lhs) = rhs
case DefNode(_, nname, rhs) =>
netlist(WRef(nname)) = rhs
- case _: IsInvalid => throwInternalError(Some("Unexpected IsInvalid, should have been removed by now"))
+ case _: IsInvalid => throwInternalError("Unexpected IsInvalid, should have been removed by now")
case _ => // Do nothing
}
stmt
diff --git a/src/main/scala/firrtl/transforms/GroupComponents.scala b/src/main/scala/firrtl/transforms/GroupComponents.scala
index 43053e3d..439a1642 100644
--- a/src/main/scala/firrtl/transforms/GroupComponents.scala
+++ b/src/main/scala/firrtl/transforms/GroupComponents.scala
@@ -5,7 +5,7 @@ import firrtl.Mappers._
import firrtl.ir._
import firrtl.annotations.{Annotation, ComponentName}
import firrtl.passes.{InferTypes, LowerTypes, MemPortUtils}
-import firrtl.Utils.{kind, throwInternalError}
+import firrtl.Utils.kind
import firrtl.graph.{DiGraph, MutableDiGraph}
import scala.collection.mutable