diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/test/resources/features/NestedSubAccessTester.fir | 29 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/FeatureSpec.scala | 13 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/FirrtlSpec.scala | 4 |
3 files changed, 44 insertions, 2 deletions
diff --git a/src/test/resources/features/NestedSubAccessTester.fir b/src/test/resources/features/NestedSubAccessTester.fir new file mode 100644 index 00000000..83a5ab9b --- /dev/null +++ b/src/test/resources/features/NestedSubAccessTester.fir @@ -0,0 +1,29 @@ +circuit NestedSubAccessTester : + module NestedSubAccess : + input foo : UInt<1>[4] + input index : UInt<2> + output out : UInt<4> + + wire vec : UInt<4>[2] + vec[0] <= UInt(3) + vec[1] <= UInt(4) + + out <= vec[foo[index]] + + module NestedSubAccessTester : + input clk : Clock + input reset : UInt<1> + + inst dut of NestedSubAccess + + dut.foo is invalid + dut.index <= UInt(2) + dut.foo[2] <= UInt(1) + + when neq(dut.out, UInt(4)) : + printf(clk, not(reset), "Assertion failed\nTest Failed!\n") + stop(clk, not(reset), 1) + else : + stop(clk, not(reset), 0) + + diff --git a/src/test/scala/firrtlTests/FeatureSpec.scala b/src/test/scala/firrtlTests/FeatureSpec.scala new file mode 100644 index 00000000..33cd473f --- /dev/null +++ b/src/test/scala/firrtlTests/FeatureSpec.scala @@ -0,0 +1,13 @@ + +package firrtlTests + +import org.scalatest._ + +// Miscellaneous Feature Checks +class FeatureSpec extends FirrtlPropSpec { + + property("Nested SubAcceses should be supported!") { + runFirrtlTest("NestedSubAccessTester", "/features") + } +} + diff --git a/src/test/scala/firrtlTests/FirrtlSpec.scala b/src/test/scala/firrtlTests/FirrtlSpec.scala index a8ccb0a9..833914d5 100644 --- a/src/test/scala/firrtlTests/FirrtlSpec.scala +++ b/src/test/scala/firrtlTests/FirrtlSpec.scala @@ -90,7 +90,7 @@ trait BackendCompilationUtilities { val e = Process(s"./V${prefix}", dir) ! ProcessLogger(line => { triggered = triggered || line.contains(assertionMsg) - //System.out.println(line) + System.out.println(line) }) triggered } @@ -116,7 +116,7 @@ trait FirrtlRunners extends BackendCompilationUtilities { verilogToCpp(prefix, testDir, Seq(), harness).! cppToExe(prefix, testDir).! - executeExpectingSuccess(prefix, testDir) + assert(executeExpectingSuccess(prefix, testDir)) } } |
