1 files changed, 19 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/UtilsSpec.scala b/src/test/scala/firrtlTests/UtilsSpec.scala
index 069c160e..8ea69460 100644
--- a/src/test/scala/firrtlTests/UtilsSpec.scala
+++ b/src/test/scala/firrtlTests/UtilsSpec.scala
@@ -1,5 +1,7 @@
 package firrtlTests
 
+import firrtl._
+import firrtl.ir._
 import firrtl.Utils
 import org.scalatest.matchers.should.Matchers._
 import org.scalatest.flatspec.AnyFlatSpec
@@ -22,4 +24,21 @@ class UtilsSpec extends AnyFlatSpec {
   for ((description, delimiter, in, out) <- expandPrefixTests) {
     it should description in { Utils.expandPrefixes(in, delimiter).toSet should be (out)}
   }
+
+  "expandRef" should "return intermediate expressions" in {
+    val bTpe = VectorType(Utils.BoolType, 2)
+    val topTpe = BundleType(Seq(Field("a", Default, Utils.BoolType), Field("b", Default, bTpe)))
+    val wr = WRef("out", topTpe, PortKind, SourceFlow)
+  
+
+    val expected = Seq(
+      wr,
+      WSubField(wr, "a", Utils.BoolType, SourceFlow),
+      WSubField(wr, "b", bTpe, SourceFlow),
+      WSubIndex(WSubField(wr, "b", bTpe, SourceFlow), 0, Utils.BoolType, SourceFlow),
+      WSubIndex(WSubField(wr, "b", bTpe, SourceFlow), 1, Utils.BoolType, SourceFlow)
+    )
+
+    (Utils.expandRef(wr)) should be (expected)
+  }
 }