diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/stanza/verilog.stanza | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/stanza/verilog.stanza b/src/main/stanza/verilog.stanza index 9d1cd536..d4b360f0 100644 --- a/src/main/stanza/verilog.stanza +++ b/src/main/stanza/verilog.stanza @@ -189,7 +189,7 @@ defn emit-module (m:InModule) : val inst-ports = HashTable<Symbol,Vector<Streamable>>(symbol-hash) val sh = get-sym-hash(m) - val rand-value = "$rand" ;"0" + val rand-value = "$random" ;"0" defn rand-string (w:Long) -> String : string-join(["{" ((w + to-long(31)) / to-long(32)) "{" rand-value "}};"]) for x in vdecs do : |
