diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/stanza/passes.stanza | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index 02eb7565..e34a8682 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -987,8 +987,8 @@ defn expand-connects (c:Circuit) -> Circuit : (s:Connect) : val n = get-size(loc(s)) val connects = Vector<Stmt>() - val locs = fast-create-exps(loc(s)) - val exps = fast-create-exps(exp(s)) + val locs = create-exps(loc(s)) + val exps = create-exps(exp(s)) for i in 0 to n do : val loc* = locs[i] val exp* = exps[i] @@ -1000,8 +1000,8 @@ defn expand-connects (c:Circuit) -> Circuit : (s:BulkConnect) : val ls = get-valid-points(type(loc(s)),type(exp(s)),DEFAULT,DEFAULT) val connects = Vector<Stmt>() - val locs = fast-create-exps(loc(s)) - val exps = fast-create-exps(exp(s)) + val locs = create-exps(loc(s)) + val exps = create-exps(exp(s)) for x in ls do : val loc* = locs[x[0]] val exp* = exps[x[1]] @@ -1043,7 +1043,7 @@ defn get-locations (e:Expression) -> List<Location> : if key?(hashed-locations,e) : hashed-locations[e] else : val x = match(e) : - (e:WRef) : map(Location{_,one},fast-create-exps(e)) + (e:WRef) : map(Location{_,one},create-exps(e)) (e:WSubIndex|WSubField) : val ls = get-locations(exp(e)) val start = get-point(e) @@ -1158,7 +1158,7 @@ defn get-entries (hash:HashTable<Expression,Expression>,exps:Streamable<Expressi (value:False) : false hash* defn get-female-refs (n:Symbol,t:Type,g:Gender) -> List<Expression> : - val exps = fast-create-exps(WRef(n,t,ExpKind(),g)) + val exps = create-exps(WRef(n,t,ExpKind(),g)) val exps* = Vector<Expression>() for i in 0 to length(exps) do : switch { _ == get-gender(t,i,g)} : @@ -1588,8 +1588,8 @@ defn infer-widths (c:Circuit) -> Circuit : ;constrain(width!(loc(s)),width!(exp(s))) ;s val n = get-size(loc(s)) - val ce-loc = fast-create-exps(loc(s)) - val ce-exp = fast-create-exps(exp(s)) + val ce-loc = create-exps(loc(s)) + val ce-exp = create-exps(exp(s)) for i in 0 to n do : val loc* = ce-loc[i] val exp* = ce-exp[i] @@ -1601,10 +1601,10 @@ defn infer-widths (c:Circuit) -> Circuit : val ls = get-valid-points(type(loc(s)),type(exp(s)),DEFAULT,DEFAULT) for x in ls do : println(x) - println(fast-create-exps(loc(s))) - println(fast-create-exps(exp(s))) - val loc* = fast-create-exps(loc(s))[x[0]] - val exp* = fast-create-exps(exp(s))[x[1]] + println(create-exps(loc(s))) + println(create-exps(exp(s))) + val loc* = create-exps(loc(s))[x[0]] + val exp* = create-exps(exp(s))[x[1]] switch { _ == get-flip(type(loc(s)),x[0],DEFAULT) } : DEFAULT : constrain(width!(loc*),width!(exp*)) REVERSE : constrain(width!(exp*),width!(loc*)) @@ -2139,7 +2139,7 @@ defn expand-name (e:Expression) -> List<Symbol> : defn lower-other-mem (e:Expression, dt:Type) -> List<Expression> : val names = expand-name(e) if length(names) < 3 : error("Shouldn't be here") - for x in fast-create-exps(names[0],dt) map : + for x in create-exps(names[0],dt) map : var base = lowered-name(x) for (x in names,i in 0 to false) do : if i >= 3 : base = symbol-join([base `_ x]) @@ -2204,7 +2204,7 @@ defn lower-types (m:Module) -> Module : (s:DefWire|DefPoison) : if is-ground?(type(s)) : s else : - val es = fast-create-exps(name(s),type(s)) + val es = create-exps(name(s),type(s)) Begin $ for (e in es, i in 0 to false) map : defn replace-type (t:Type) -> Type : type(e) defn replace-name (n:Symbol) -> Symbol : lowered-name(e) @@ -2212,13 +2212,13 @@ defn lower-types (m:Module) -> Module : (s:DefRegister) : if is-ground?(type(s)) : s else : - val es = fast-create-exps(name(s),type(s)) + val es = create-exps(name(s),type(s)) Begin $ for (e in es, i in 0 to false) map : - val init = lower-types-e(fast-create-exps(init(s))[i]) + val init = lower-types-e(create-exps(init(s))[i]) DefRegister(info(s),lowered-name(e),type(e),clock(s),reset(s),init) (s:WDefInstance) : val fields* = for f in fields(type(s) as BundleType) map-append : - val es = fast-create-exps(WRef(name(f),type(f),ExpKind(),flip(f) * MALE)) + val es = create-exps(WRef(name(f),type(f),ExpKind(),flip(f) * MALE)) for e in es map : switch { _ == gender(e) } : MALE : Field(lowered-name(e),DEFAULT,type(f)) @@ -2228,7 +2228,7 @@ defn lower-types (m:Module) -> Module : mdt[name(s)] = data-type(s) if is-ground?(data-type(s)) : s else : - val es = fast-create-exps(name(s),data-type(s)) + val es = create-exps(name(s),data-type(s)) Begin $ for e in es map : DefMemory(info(s),lowered-name(e),type(e),depth(s),write-latency(s),read-latency(s),readers(s),writers(s),readwriters(s)) (s:Connect) : @@ -2241,7 +2241,7 @@ defn lower-types (m:Module) -> Module : val ports* = for p in ports(m) map-append : - val es = fast-create-exps(WRef(name(p),type(p),PortKind(),to-gender(direction(p)))) + val es = create-exps(WRef(name(p),type(p),PortKind(),to-gender(direction(p)))) for e in es map : Port(info(p),lowered-name(e),to-dir(gender(e)),type(e)) match(m) : @@ -2560,7 +2560,7 @@ defn emit-verilog (m:InModule) -> Module : (s:Stop) : simulate(clk(s),en(s),stop(ret(s))) (s:Print) : simulate(clk(s),en(s),printf(string(s),args(s))) (s:WDefInstance) : - val es = fast-create-exps(WRef(name(s),type(s),InstanceKind(),MALE)) + val es = create-exps(WRef(name(s),type(s),InstanceKind(),MALE)) instantiate(name(s),module(s),es) (s:DefMemory) : val mem = WRef(name(s),get-type(s),MemKind(append-all([readers(s) writers(s) readwriters(s)])),UNKNOWN-GENDER) |