diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary | 1 | ||||
| -rw-r--r-- | src/main/scala/firrtl/passes/memlib/MemLibOptions.scala | 15 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary b/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary new file mode 100644 index 00000000..abfcceb0 --- /dev/null +++ b/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary @@ -0,0 +1 @@ +firrtl.passes.memlib.MemLibOptions diff --git a/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala b/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala new file mode 100644 index 00000000..2f26e4e5 --- /dev/null +++ b/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala @@ -0,0 +1,15 @@ +// See LICENSE for license details. + +package firrtl.passes.memlib + +import firrtl._ +import firrtl.options.RegisteredLibrary +import scopt.OptionParser + +class MemLibOptions extends RegisteredLibrary { + val name: String = "MemLib Options" + def addOptions(p: OptionParser[AnnotationSeq]): Unit = + Seq( new InferReadWrite, + new ReplSeqMem ) + .map(_.addOptions(p)) +} |