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-rw-r--r--src/main/scala/firrtl/passes/Passes.scala8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/Passes.scala b/src/main/scala/firrtl/passes/Passes.scala
index 66437556..d5d9a3b6 100644
--- a/src/main/scala/firrtl/passes/Passes.scala
+++ b/src/main/scala/firrtl/passes/Passes.scala
@@ -238,6 +238,13 @@ object Legalize extends Pass {
case _ => expr
}
}
+ private def legalizePad(expr: DoPrim): Expression = expr.args.head match {
+ case UIntLiteral(value, IntWidth(width)) if (width < expr.consts.head) =>
+ UIntLiteral(value, IntWidth(expr.consts.head))
+ case SIntLiteral(value, IntWidth(width)) if (width < expr.consts.head) =>
+ SIntLiteral(value, IntWidth(expr.consts.head))
+ case _ => expr
+ }
private def legalizeConnect(c: Connect): Statement = {
val t = c.loc.tpe
val w = bitWidth(t)
@@ -256,6 +263,7 @@ object Legalize extends Pass {
def legalizeE(expr: Expression): Expression = expr map legalizeE match {
case prim: DoPrim => prim.op match {
case Shr => legalizeShiftRight(prim)
+ case Pad => legalizePad(prim)
case Bits => legalizeBits(prim)
case _ => prim
}