4 files changed, 19 insertions, 3 deletions
diff --git a/src/main/proto/firrtl.proto b/src/main/proto/firrtl.proto
index e8451d7a..6ce1c108 100644
--- a/src/main/proto/firrtl.proto
+++ b/src/main/proto/firrtl.proto
@@ -276,6 +276,7 @@ message Firrtl {
       IsInvalid is_invalid = 17;
       MemoryPort memory_port = 18;
       Attach attach = 20;
+      Verification verification = 21;
     }
 
     SourceInfo source_info = 19;
diff --git a/src/main/scala/firrtl/proto/FromProto.scala b/src/main/scala/firrtl/proto/FromProto.scala
index cb9b705e..ed641eb2 100644
--- a/src/main/scala/firrtl/proto/FromProto.scala
+++ b/src/main/scala/firrtl/proto/FromProto.scala
@@ -258,9 +258,10 @@ object FromProto {
       case MEMORY_FIELD_NUMBER          => convert(stmt.getMemory, info)
       case IS_INVALID_FIELD_NUMBER =>
         ir.IsInvalid(convert(info), convert(stmt.getIsInvalid.getExpression))
-      case CMEMORY_FIELD_NUMBER     => convert(stmt.getCmemory, info)
-      case MEMORY_PORT_FIELD_NUMBER => convert(stmt.getMemoryPort, info)
-      case ATTACH_FIELD_NUMBER      => convert(stmt.getAttach, info)
+      case CMEMORY_FIELD_NUMBER      => convert(stmt.getCmemory, info)
+      case MEMORY_PORT_FIELD_NUMBER  => convert(stmt.getMemoryPort, info)
+      case ATTACH_FIELD_NUMBER       => convert(stmt.getAttach, info)
+      case VERIFICATION_FIELD_NUMBER => convert(stmt.getVerification, info)
     }
   }
 
diff --git a/src/main/scala/firrtl/proto/ToProto.scala b/src/main/scala/firrtl/proto/ToProto.scala
index 4cdf6b85..f5ade0e3 100644
--- a/src/main/scala/firrtl/proto/ToProto.scala
+++ b/src/main/scala/firrtl/proto/ToProto.scala
@@ -307,6 +307,7 @@ object ToProto {
               .setCond(convert(cond))
               .setEn(convert(en))
               .setMsg(msg.string)
+            sb.setVerification(vb)
           case ir.IsInvalid(_, expr) =>
             val ib = Firrtl.Statement.IsInvalid
               .newBuilder()
diff --git a/src/test/scala/firrtlTests/ProtoBufSpec.scala b/src/test/scala/firrtlTests/ProtoBufSpec.scala
index d56ef7b1..e5909944 100644
--- a/src/test/scala/firrtlTests/ProtoBufSpec.scala
+++ b/src/test/scala/firrtlTests/ProtoBufSpec.scala
@@ -218,6 +218,19 @@ class ProtoBufSpec extends FirrtlFlatSpec {
     FromProto.convert(ToProto.convert(vi).build) should equal(expected)
   }
 
+  it should "support Verification" in {
+    val clk = ir.Reference("clk", UnknownType)
+    val pred = ir.Reference("pred", UnknownType)
+    val en = ir.Reference("en", UnknownType)
+    val assert = ir.Verification(ir.Formal.Assert, ir.NoInfo, clk, pred, en, ir.StringLit("my assert message"))
+    val assume = ir.Verification(ir.Formal.Assume, ir.NoInfo, clk, pred, en, ir.StringLit("my assume message"))
+    val cover = ir.Verification(ir.Formal.Cover, ir.NoInfo, clk, pred, en, ir.StringLit("my cover message"))
+
+    FromProto.convert(ToProto.convert(assert).head.build) should equal(assert)
+    FromProto.convert(ToProto.convert(assume).head.build) should equal(assume)
+    FromProto.convert(ToProto.convert(cover).head.build) should equal(cover)
+  }
+
   it should "appropriately escape and unescape FileInfo strings" in {
     val pairs = Seq(
       "test\\ntest" -> "test\ntest",