diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/stanza/custom-compiler.stanza | 2 | ||||
| -rw-r--r-- | src/main/stanza/flo.stanza | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/main/stanza/custom-compiler.stanza b/src/main/stanza/custom-compiler.stanza index aa21504b..773b63ca 100644 --- a/src/main/stanza/custom-compiler.stanza +++ b/src/main/stanza/custom-compiler.stanza @@ -32,7 +32,7 @@ public defmethod passes (c:InstrumentedVerilog) -> List<Pass> : SplitExp() ToRealIR() SpecialRename(`#,`_) - CheckHighForm(`_) + CheckHighForm(expand-delin) CheckLowForm() Verilog(file(c)) ] diff --git a/src/main/stanza/flo.stanza b/src/main/stanza/flo.stanza index 22b0c978..fd000e20 100644 --- a/src/main/stanza/flo.stanza +++ b/src/main/stanza/flo.stanza @@ -89,7 +89,7 @@ public defn pad-widths (c:Circuit) -> Circuit : Circuit{info(c),_,main(c)} $ for m in modules(c) map : match(m) : - (m:ExModule) : error("Cannot use flo backend with external modules") + (m:ExModule) : m (m:InModule) : InModule(info(m),name(m),ports(m),pad-widths-s(body(m))) ;============= Flo Backend ================ |
