diff options
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/firrtl/testutils/FirrtlSpec.scala | 4 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/ChirrtlMemSpec.scala | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/test/scala/firrtl/testutils/FirrtlSpec.scala b/src/test/scala/firrtl/testutils/FirrtlSpec.scala index c9cd1ecd..cab66332 100644 --- a/src/test/scala/firrtl/testutils/FirrtlSpec.scala +++ b/src/test/scala/firrtl/testutils/FirrtlSpec.scala @@ -306,12 +306,12 @@ class TestFirrtlFlatSpec extends FirrtlFlatSpec { it should "be supported on Circuit" in { assert(c search { - case Connect(_, Reference("out",_), Reference("in",_)) => true + case Connect(_, Reference("out",_, _, _), Reference("in", _, _, _)) => true }) } it should "be supported on CircuitStates" in { assert(state search { - case Connect(_, Reference("out",_), Reference("in",_)) => true + case Connect(_, Reference("out", _, _, _), Reference("in",_, _, _)) => true }) } it should "be supported on the results of compilers" in { diff --git a/src/test/scala/firrtlTests/ChirrtlMemSpec.scala b/src/test/scala/firrtlTests/ChirrtlMemSpec.scala index 3868c237..b22283a7 100644 --- a/src/test/scala/firrtlTests/ChirrtlMemSpec.scala +++ b/src/test/scala/firrtlTests/ChirrtlMemSpec.scala @@ -258,7 +258,7 @@ circuit foo : |""".stripMargin val res = (new HighFirrtlCompiler).compile(CircuitState(parse(input), ChirrtlForm), Seq()).circuit assert(res search { - case Connect(_, SubField(SubField(Reference("mem", _), "bar", _), "clk", _), DoPrim(AsClock, Seq(Reference("clock", _)), _, _)) => true + case Connect(_, SubField(SubField(Reference("mem", _, _, _), "bar", _, _), "clk", _, _), DoPrim(AsClock, Seq(Reference("clock", _, _, _)), _, _)) => true }) } } |