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-rw-r--r--src/test/scala/firrtlTests/ReplSeqMemTests.scala22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/ReplSeqMemTests.scala b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
index 17f4dcfd..13eb63e2 100644
--- a/src/test/scala/firrtlTests/ReplSeqMemTests.scala
+++ b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
@@ -530,4 +530,26 @@ circuit Top :
}
}
+ "ReplSeqMem" should "not run a buggy Uniquify" in {
+ val input =
+ """circuit test :
+ | extmodule foo :
+ | input in : UInt<8>
+ | output y : UInt<8>
+ |
+ | module test :
+ | input in : UInt<8>
+ | output out : UInt<8>
+ |
+ | inst f of foo
+ | node f_in = and(in, UInt(123))
+ | f.in <= f_in
+ | out <= f.y""".stripMargin
+ val confLoc = "ReplSeqMemTests.confTEMP"
+ val annos = Seq(ReplSeqMemAnnotation.parse("-c:test:-o:" + confLoc))
+ // Just check that it doesn't crash
+ compileAndEmit(CircuitState(parse(input), ChirrtlForm, annos))
+ (new java.io.File(confLoc)).delete()
+ }
+
}