diff options
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/firrtl/LoweringCompilers.scala | 1 | ||||
| -rw-r--r-- | src/main/scala/firrtl/passes/Checks.scala | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/LoweringCompilers.scala b/src/main/scala/firrtl/LoweringCompilers.scala index eb873232..c29ce01a 100644 --- a/src/main/scala/firrtl/LoweringCompilers.scala +++ b/src/main/scala/firrtl/LoweringCompilers.scala @@ -64,6 +64,7 @@ class HighFirrtlToMiddleFirrtl extends CoreTransform { passes.CheckInitialization, passes.ResolveKinds, passes.InferTypes, + passes.CheckTypes, passes.ResolveGenders, passes.InferWidths, passes.CheckWidths) diff --git a/src/main/scala/firrtl/passes/Checks.scala b/src/main/scala/firrtl/passes/Checks.scala index 0d16ef00..769f68a9 100644 --- a/src/main/scala/firrtl/passes/Checks.scala +++ b/src/main/scala/firrtl/passes/Checks.scala @@ -250,6 +250,8 @@ object CheckTypes extends Pass { s"$info: [module $mname] Must mux between passive types.") class MuxCondUInt(info: Info, mname: String) extends PassException( s"$info: [module $mname] A mux condition must be of type UInt.") + class MuxClock(info: Info, mname: String) extends PassException( + s"$info: [module $mname] Firrtl does not support muxing clocks.") class ValidIfPassiveTypes(info: Info, mname: String) extends PassException( s"$info: [module $mname] Must validif a passive type.") class ValidIfCondUInt(info: Info, mname: String) extends PassException( @@ -371,6 +373,8 @@ object CheckTypes extends Pass { case _: UIntType => case _ => errors append new MuxCondUInt(info, mname) } + if ((e.tval.tpe == ClockType) || (e.fval.tpe == ClockType)) + errors.append(new MuxClock(info, mname)) case (e: ValidIf) => if (!passive(e.tpe)) errors append new ValidIfPassiveTypes(info, mname) |